Non-Volatile Memory Sector Protection via Volatile Copy and Integrity Check
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Solution Overview
Problem
Existing non-volatile memory devices face architectural restraints and increased circuit complexity when implementing robust protection systems against hacker attacks, as they require dedicated read and write/erase circuitry for inaccessible non-volatile memory regions, which complicates simultaneous data reading and modification operations.
Innovation Solution
The method involves copying sector protection information from a dedicated non-volatile memory space into a volatile memory array at power-on, using additional check columns with preset logic information to verify integrity before allowing data modifications, thereby preventing unauthorized changes and reducing the need for dedicated read circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile protection information is stored in an inaccessible memory region, then security against hacker attacks is improved, but device complexity and silicon area increase due to dedicated read and write/erase circuitry
Solution Approach 1:
The patent copies protection information from non-volatile inaccessible memory to a volatile memory array at power-on. This copy resides in the same address space as user data, allowing standard read/write circuitry to access it. The copying approach maintains security (since the original remains protected) while eliminating the need for dedicated access circuitry to a separate protected region.
Solution Approach 2:
The patent makes the volatile memory array serve dual purposes: storing user data and storing protection information. By placing protection information in the same address space as user data and using standard memory access circuitry for both, the system eliminates the need for separate dedicated circuitry, thereby reducing overall device complexity while maintaining security through the volatility-based protection mechanism.
2Reliability
If non-volatile protection information is stored in an inaccessible memory region, then security against hacker attacks is improved, but silicon area increases due to additional dedicated circuitry
Solution Approach 1:
The patent merges the storage of protection information with the existing volatile memory array used for user data. Instead of creating a separate protected memory region with dedicated circuitry, the system combines protection information storage with the existing memory infrastructure, thereby reducing silicon area while maintaining security through the volatility-based protection mechanism.
3Device complexity
If protection information is stored in volatile memory, then device complexity is reduced, but security against hacker attacks deteriorates due to potential corruption or unauthorized modification
Solution Approach 1:
The patent performs preliminary copying of protection information from the protected non-volatile source to the volatile memory array at power-on, before any user operations can occur. This preliminary action ensures that the volatile copy is freshly initialized from the secure source, and any subsequent corruption can be detected by comparing with the original or through checksum verification, thereby maintaining security despite using volatile storage.
Data Source
AI summary
A non-volatile memory device includes addressable sectors and an ancillary volatile memory array. The ancillary volatile memory array stores protection information in the addressable sectors that is not accessible to users of the memory. The protection information is downloaded in the memory array at every power-on of the memory device. The memory array includes at least two additional columns containing preset logic information physically adjacent to the columns containing the downloaded information. A logic circuit is input with the logic information read from the additional check columns for checking the integrity of the preset logic information content of the check columns. An integrity check signal is output by the logic circuit.