Non-Volatile Memory Secure Erasure via Wear Leveling
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Solution Overview
Problem
Existing methods for securely erasing data from non-volatile semiconductor mass storage devices are inadequate, as they cannot effectively overwrite memory areas that cannot be directly accessed, and require manufacturer-specific firmware interventions, making it difficult to ensure complete and irreversible deletion.
Innovation Solution
A method that utilizes a metafileless file system and TRIM commands to overwrite the entire physical memory area with predetermined bit patterns, ensuring that both accessible and inaccessible memory areas are securely erased, without requiring knowledge of the firmware or manufacturer-specific interventions, by using a controller to manage wear leveling and bit pattern changes across memory areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical destruction methods (demagnetizing or mechanical destruction) are used to delete data, then data security is improved, but the storage device cannot be reused and causes material loss
Solution Approach 1:
The patent changes the data state parameters by overwriting storage units with predetermined bit patterns (first and second patterns) instead of physical destruction. The controller manages wear leveling algorithms to redistribute write operations across physical storage units, enabling logical erasure that preserves the physical device while ensuring data security through multiple overwrite passes with different patterns
2Reliability
If existing erasure algorithms for magnetic hard disk drives are applied to semiconductor storage devices, then data can be overwritten, but the methods are ineffective due to fundamental differences in data organization and free space management
Solution Approach 1:
The patent applies local quality by implementing erasure operations specifically adapted to semiconductor storage characteristics. The controller's wear leveling algorithm is leveraged to target specific physical storage units for overwriting while managing the unique free space organization of semiconductor devices. The method uses predetermined bit patterns written through the interface that the controller distributes according to its wear compensation algorithm, creating a localized erasure approach tailored to semiconductor architecture rather than applying generic magnetic drive algorithms
3Reliability
If manufacturer-specific firmware modifications are implemented to achieve secure erasure, then data deletion reliability is improved, but device complexity increases and portability across manufacturers is reduced
Solution Approach 1:
The patent achieves universality by designing an erasure method that works across different semiconductor storage device manufacturers without requiring firmware modifications. The approach uses standard interfaces and leverages the common wear leveling functionality present in semiconductor storage controllers. By sending write commands with predetermined bit patterns through the standard interface and relying on the controller's inherent wear compensation algorithm, the method provides manufacturer-independent secure erasure that maintains portability while ensuring reliability
Data Source
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AI summary
The invention relates to a method (V) for securely erasing a non-volatile semiconductor mass memory (HMS) having a plurality of physical memory units. The semiconductor mass memory (HMS) comprises a controller (CNT), which is designed, when a command to overwrite memory units associated with a first memory area (SB1) is received via the interface (SS), to change the association of the memory units with the first memory area (SB1) and a second memory area (SB2) in accordance with an algorithm in order to produce wear levelling. The method (V) comprises the following steps: - marking the entire addressable first memory area (SB1) for erasing; - sending out a release command; - releasing the first memory area (SB1); - sending out at least one first write command to the controller (CNT) via the interface (SS) in order to write to the entire first memory area (SB1); and - sending out at least one second write command to the controller via the interface in order to overwrite at least a predetermined part of previously written data blocks. The invention further relates to a computer system (CS) and a computer program product.