Semiconductor Memory Device On-Chip Data Processing Security

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Solution Overview

Problem

Existing semiconductor memory systems face inefficiencies in data processing due to the need for external memory storage of encrypted data, which degrades processing efficiency without compromising security.

Innovation Solution

A semiconductor memory device with an on-chip processor and memory security controller that decrypts encrypted data for on-chip processing and re-encrypts the results, enhancing data processing efficiency without compromising security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If encrypted data is stored in external memory, then data security is maintained, but data processing efficiency is degraded

Engineering Contradiction:
Improvedata securityVSAvoiddata processing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent combines the security controller and on-chip processor within the memory device itself, merging previously separate functions (encryption/decryption and data processing) into a single integrated system. This allows encrypted data to be decrypted and processed without external memory access, improving processing efficiency while maintaining security through the integrated security controller.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The security controller acts as an intermediary between the encrypted data in memory and the on-chip processor. It decrypts data before processing and re-encrypts results, serving as a mediator that enables efficient on-chip processing while maintaining the security boundary. This intermediary function resolves the contradiction by allowing fast processing of decrypted data while preserving security through controlled encryption/decryption operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If on-chip memory is implemented in host processor, then data security is improved, but device complexity and cost increase

Engineering Contradiction:
Improvedata securityVSAvoidprocessor complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the security controller and on-chip processor from the host processor and places them within the memory device. This extraction reduces the complexity burden on the host processor while maintaining data security functions. The memory device becomes a self-contained unit with integrated security and processing capabilities, reducing overall system complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If encrypted data is processed externally, then security is maintained, but processing time increases

Engineering Contradiction:
Improvedata securityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The security controller performs preliminary decryption of encrypted data before it reaches the on-chip processor. This preliminary action enables the processor to work with decrypted data at full speed without waiting for external decryption operations. The re-encryption of results is also performed preliminarily within the device, reducing overall processing time while maintaining security.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11056173B2Semiconductor memory device and memory module including the same
Publication Date: 2021.07.06 SAMSUNG ELECTRONICS CO LTD
  • US11056173B2 patent drawing
  • US11056173B2 patent drawing
  • US11056173B2 patent drawing

AI summary

A semiconductor memory device includes a memory core including a plurality of memory cells, an on-chip processor and a memory security controller. The on-chip processor performs on-chip data processing. The memory security controller decrypts encrypted data provided from the memory core or from a memory controller and to provide the decrypted data to the on-chip processor and encrypts result data from the on-chip processor to provide result-encrypted data to the memory core or the memory controller. Data processing efficiency may be enhanced without degradation of data security by decrypting the encrypted data in the semiconductor memory device to perform the on-chip data processing.