Memory Segmentation for Parallel Video Processing Bandwidth

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Solution Overview

Problem

Real-time video encoding in video telephony applications is hindered by the need for extensive and rapid image processing, which requires high bandwidth memory and large memory capacity, often limited in video coding devices.

Innovation Solution

An organizational scheme for memory that includes pixel data for multiple images in memory words, allowing contiguous storage and separation of pixel data for parallel processing, facilitated by a memory controller architecture that supports efficient access and distribution to different image processing modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If extensive image processing is performed to ensure real-time video transmission quality, then image quality attributes (tone reproduction, color saturation, hue reproduction, sharpness) are improved, but memory bandwidth requirements and memory capacity requirements increase significantly

Engineering Contradiction:
Improveimage qualityVSAvoidmemory bandwidth
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The patent segments the memory organization into multiple planes (e.g., even and odd pixel planes) that can be independently accessed. This allows parallel processing of different image data portions simultaneously, effectively increasing memory bandwidth availability without requiring proportionally more physical memory resources. The segmented structure enables multiple image processing modules to access different planes concurrently, supporting extensive image processing while managing memory bandwidth constraints.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple image processing modules operate in parallel to achieve real-time processing, then processing speed is improved, but memory bandwidth consumption increases

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory bandwidth
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The memory is divided into multiple independently accessible planes that can be simultaneously accessed by different image processing modules. This segmentation allows parallel processing operations to occur without competing for the same memory bandwidth resources, as each module can access its designated plane concurrently with others.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The same physical memory structure serves multiple functions by providing independent access paths to different planes for multiple processing modules simultaneously. The memory system universally supports both sequential processing (for compatibility) and parallel processing (for speed), allowing the hardware to be used efficiently for different processing configurations without requiring separate dedicated memory for each module.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If memory is optimized for high bandwidth image processing, then real-time video encoding capability is improved, but memory versatility for other storage applications is reduced

Engineering Contradiction:
Improvereal-time video encoding capabilityVSAvoidmemory versatility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The memory architecture provides multi-functionality by allowing the same physical memory to be configured for different access patterns and purposes. When parallel image processing is needed, the memory operates in plane-separated mode for high bandwidth performance. When other storage applications are needed, the memory can be accessed in conventional sequential mode, maintaining versatility for different workloads without requiring dedicated hardware for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8045021B2Memory organizational scheme and controller architecture for image and video processing
Publication Date: 2011.10.25 QUALCOMM INC
  • US8045021B2 patent drawing
  • US8045021B2 patent drawing
  • US8045021B2 patent drawing

AI summary

This disclosure describes an organizational scheme for memory that is useful for image processing. A memory controller architecture is also described, which takes advantage of the organizational scheme. The organizational scheme and controller architecture is particularly useful for high performance, high quality image processing of images that form a video sequence, but may also be applied in other image processing settings. The described techniques and organizational structure of the memory also allows the memory to be shared for other storage applications of a video device.