Non-volatile Memory Selection Line Trench Isolation Bridging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In non-volatile memory devices, such as flash memory, improper bridging between floating gates due to residual conductive substances on shallow trench isolation sidewalls can occur, leading to product defects and reduced storage capacity.
Innovation Solution
A non-volatile memory device structure is designed with a selection line formed as a trench line in the substrate, which is filled with a conductive material like doped polysilicon, tungsten, or metal, and is coupled to the memory gate structure, ensuring no residue remains on the shallow trench isolation sidewalls, thereby preventing bridging between adjacent memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the shallow trench isolation structure is cut off and the erasing gate line is placed between the cut structures, then the device can achieve shared erasing gate functionality for two memory cells, but residual conductive substance may remain on the sidewall of the shallow trench isolation structure causing improper bridging between floating gates
Solution Approach 1:
The shallow trench isolation structure is divided into two separate segments (first and second STI structures) that are positioned on opposite sides of the erasing gate line. This segmentation allows the erasing gate line to be placed between the cut STI structures, enabling shared erasing functionality for two memory cells while preventing residual conductive substance from causing bridging between floating gates.
2Ease of manufacture
If the control gate line is formed with standard alignment, then the fabrication process is simple, but alignment shift may cause the sidewall of the shallow trench isolation structure to be covered, leaving residual conductive substance that causes bridging
Solution Approach 1:
The shallow trench isolation structures are pre-formed and positioned before the control gate line fabrication process. By establishing the STI structures first as reference features, the subsequent control gate line formation can be aligned relative to these fixed structures, reducing the impact of alignment shifts and preventing residual conductive substance from covering the STI sidewalls.
3Quantity of substance
If the storage capacity is increased by adding more memory cells, then the device can store more data, but the volume increases, conflicting with the requirement for small volume
Solution Approach 1:
The erasing gate line is designed to be shared by two adjacent memory cells, allowing a single conductive structure to serve dual functions. This merging approach enables increased storage capacity through additional memory cells while minimizing the volume increase, as the shared erasing gate line reduces the overall conductive material required compared to having separate erasing gates for each cell.
Data Source
AI summary
A non-volatile memory device includes a substrate. A plurality of shallow trench isolation (STI) lines are disposed on the substrate and extend along a first direction. A memory gate structure is disposed on the substrate between adjacent two of the plurality of STI lines. A trench line is disposed in the substrate and extends along a second direction intersecting the first direction, wherein the trench line also crosses top portions of the plurality of STI lines. A conductive line is disposed in the trench line and used as a selection line to be coupled to the memory gate structure.