Semiconductor Memory Selective Activation Circuit Power Control
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Solution Overview
Problem
Current semiconductor memory devices face challenges in reducing power consumption, as disconnecting the main and sub power source lines during standby only controls the entire chip's state, failing to selectively deactivate specific internal circuit portions, leading to inadequate power savings.
Innovation Solution
A semiconductor memory device with a selective activation circuit that activates specific circuit areas based on address signals, disconnecting power to non-active areas within memory banks, using a combination of main and sub power source lines with switch circuits to manage power distribution dynamically.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the main power source line and sub power source line are disconnected during standby state, then the entire chip enters standby mode and power consumption is reduced, but it is not possible to selectively deactivate specific internal circuit portions leading to inadequate power savings
Solution Approach 1:
The patent segments the power supply system by introducing sub power source lines for each memory bank, allowing independent power control of each bank. The power supply lines are divided into a first power supply line (main) and second power supply lines (sub) corresponding to each memory bank, enabling fine-grained power management at the bank level rather than chip-level only.
Solution Approach 2:
The patent applies local quality by enabling different power states for different memory banks. Each memory bank can be independently activated or deactivated based on access patterns, so that only active banks consume power while inactive banks enter standby mode. This creates non-uniform power consumption across the chip, optimizing overall energy efficiency.
2Speed
If low threshold voltage transistors are used to achieve high speed operation, then switching speed is improved, but sub-threshold current increases in non-conductive state leading to higher power consumption
Solution Approach 1:
The patent dynamically controls power supply to memory banks based on access patterns. When a memory bank is not accessed, its sub power source line is disconnected, forcing transistors in that bank into a true standby state with minimal leakage current. When access is needed, power is restored. This dynamic approach allows the system to utilize low threshold voltage transistors for high-speed operation when needed while minimizing their leakage current consumption during standby periods.
Data Source
AI summary
A semiconductor memory device includes a plurality of memory banks each including a plurality of circuit areas selected based on an address signal, any one of which is selected by a corresponding bank selective signal (source transistor control signals), and a selective activation circuit that, from among circuit areas included in a memory bank that is selected based on the bank selective signal, activates any one of the circuit areas based on the address signal, and deactivates at least one of rest of the circuit areas. According to the present invention, the power consumption can be reduced in an active state by a dynamic power control in response to an address signal, not by entire power control by an external command.