Memory Device Power Control via Selective Module Activation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Solid state drives (SSDs) using the NVMe or NVMHCI interface face latency issues during power-up operations due to reduced standby power consumption, which affects their performance.
Innovation Solution
A memory device with a host interface, a register, a memory access monitor, and a power control manager that selectively powers up groups of modules based on monitored access regions, allowing for efficient power management and reduced latency during power-up operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If standby power consumption is reduced in NVMe or NVMHCI interface memory devices, then power efficiency is improved, but power-up latency increases
Solution Approach 1:
The memory device is divided into multiple independently controllable power domains or modules, each capable of being powered up or down separately. This segmentation allows the system to reduce standby power by keeping unused modules in a low-power state while maintaining the ability to quickly activate only the necessary modules when needed, thus resolving the contradiction between low standby power and fast power-up latency.
Solution Approach 2:
The system performs preliminary actions by pre-configuring power management settings and maintaining a ready state for critical modules during standby mode. This allows the memory device to minimize power-up latency for essential operations while still achieving reduced standby power consumption through selective powering of non-critical modules.
2Loss of energy
If selective power management is implemented for memory modules, then standby power consumption is reduced, but device complexity increases
Solution Approach 1:
The memory device implements self-service power management where the system automatically monitors its own power state and selectively activates modules based on operational needs without requiring complex external control. This self-managed approach reduces standby power consumption while minimizing the complexity burden on the host system.
Solution Approach 2:
The power management mechanism is designed to be universal and multi-functional, handling both power reduction and quick activation through a single integrated control system. This multi-functionality reduces the need for separate complex control circuits for different power management scenarios.
Data Source
AI summary
A memory device executes a method of controlling power of the memory device. The memory device includes a host interface which receives a command from a host and controls an access to the memory device by the host, a register which is accessible by the host and includes a plurality of different regions, a memory access monitor which monitors which region of the plurality of regions the host accesses, and in response thereto generates a monitoring signal, and a power control manager which selects a power-up group of modules of the memory device in accordance with the monitoring signal and which supplies power to the selected power-up group of modules while not supplying power to any modules of the memory device not belonging to the selected power-up group.