Memory Cell Selector Interface for Peeling-Resistant Adhesion

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Solution Overview

Problem

The challenge in semiconductor manufacturing is the peeling and contact failure between the selector layer and the electrode, which affects the yield and stability of semiconductor devices, particularly in non-volatile memory devices like resistive random-access memories.

Innovation Solution

Incorporating an intermediate layer between the selector layer and the electrode, which serves as a glue or barrier layer, and forming the selector layer with a larger top area to provide a stable base, thereby improving adhesion and preventing peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an intermediate layer is added between the selector layer and electrode, then adhesion and stability are improved, but device structure becomes more complex

Engineering Contradiction:

Improveadhesion between selector layer and electrodeVSAvoidstructure of selector device

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

An intermediate layer comprising a first layer and a second layer is introduced between the selector layer and the electrode. The first layer is in contact with the selector layer and the second layer is in contact with the electrode, creating a graduated transition that improves adhesion and reduces peeling while distributing mechanical stress across multiple interfaces.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The intermediate layer is divided into two distinct layers with different material compositions and functions. The first layer primarily bonds to the selector layer while the second layer primarily bonds to the electrode, allowing each layer to be optimized for its specific bonding interface rather than requiring a single material to satisfy both requirements.

Inventive Principle:

Principle #1Segmentation

2Reliability

If the selector layer is formed with a larger top area, then peeling is prevented and stability is improved, but manufacturing precision requirements increase

Engineering Contradiction:

Improvestability of selector layerVSAvoiddimensional control of selector layer

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The selector layer is designed with an asymmetric area distribution where the top area is intentionally made larger than the bottom area in contact with the electrode. This asymmetric geometry provides a broader bonding surface at the top interface with the intermediate layer, improving adhesion and stability while the gradual taper reduces stress concentration.

Inventive Principle:

Principle #4Asymmetry

Data Source

PatentUS12426276B2Semiconductor device, memory cell and method of forming the same

Publication Date: 2025.09.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Provided is a memory cell including a selector disposed over a substrate, a memory element and a connecting pad. The selector includes a bottom electrode, an ovonic threshold switch layer on the bottom electrode, an inter-electrode over the ovonic threshold switch layer, and an intermediate layer between the ovonic threshold switch layer and the inter-electrode. The memory element is disposed on the selector. The connecting pad is disposed on the memory element.