3D Crossbar Memory Selector and Voltage Divider for Read Accuracy
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Solution Overview
Problem
The 3D crossbar memory array architecture faces challenges due to sneak currents, which can lead to read errors and increased power consumption, especially as the array size increases.
Innovation Solution
Incorporating a selector in series with each memory cell in the 1S1R structure to suppress sneak currents, and using an external voltage divider to maintain the RRAM in a low resistance state during negative read processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a 3D crossbar memory array architecture is used to increase storage density, then storage capacity is improved, but sneak currents increase leading to read errors and higher power consumption
Solution Approach 1:
The memory cell is segmented into two functional components: a selector element and a memory element. The selector element acts as a gate that controls current flow, allowing current to pass only when a threshold voltage is exceeded. This segmentation prevents sneak currents from flowing through non-selected cells, thereby eliminating read errors while maintaining the high storage density of the 3D crossbar architecture.
2Quantity of substance
If a 3D crossbar memory array architecture is used to increase storage density, then storage capacity is improved, but power consumption increases due to sneak currents
Solution Approach 1:
The memory cell is segmented into two functional components: a selector element and a memory element. The selector element acts as a gate that controls current flow, allowing current to pass only when a threshold voltage is exceeded. This segmentation prevents sneak currents from flowing through non-selected cells, thereby eliminating read errors while maintaining the high storage density of the 3D crossbar architecture.
3Reliability
If a selector is added in series with each memory cell to suppress sneak currents, then read accuracy is improved, but device complexity increases
Solution Approach 1:
The selector element is extracted as a separate, dedicated component from the memory cell structure. By taking out the selection function as an independent element with threshold switching characteristics, the design achieves precise control over current flow paths. This extraction allows the selector to be optimized independently for low leakage and high threshold voltage, improving read accuracy without requiring complex control circuitry.
4Adaptability or versatility
If RRAM is used during negative read processes, then memory operation flexibility is improved, but memory window stability deteriorates
Solution Approach 1:
The selector element serves as an intermediary component between the memory element and the read circuitry. During negative read processes, the selector's threshold switching characteristics act as a mediator that controls and stabilizes the voltage distribution across the memory cell. This intermediary function ensures that the voltage across the RRAM remains within safe operating limits, preventing unintended state changes and maintaining memory window stability while allowing flexible read operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The introduction of selectors reduces sneak currents, improving read accuracy and reducing power consumption, while the external voltage divider enhances the memory window stability during negative read operations.
Implementation Method 1
a selector electrically coupled to the memory device... The read circuit reads a selected reference memory cell... adjusting a read voltage of the memory cell
Implementation Method 2
using an external voltage divider to maintain the RRAM in a low resistance state during negative read processes
Data Source
AI summary
A memory circuit and a method for reading a memory circuit are provided. The memory circuit includes reference memory cells and operation memory cells. The method includes reading a selected reference memory cell at a first time to get a first voltage; reading the selected reference memory cell at a second time after the first time to get a second voltage; adjusting a read voltage of the memory cell to be an adjusted read voltage of the memory cell according to the voltage difference between the first voltage and the second voltage; applying the adjusted read voltage on a selected operation memory cell corresponding to the selected reference memory cell; and applying the adjusted read voltage on other selected operation memory cells in a same row of the memory array corresponding to the selected reference memory cell. The time difference between the first time and the second time is within a range smaller than a predetermined time difference according to characteristics of a corresponding selector in the selected reference memory cell or the selected operation memory cell.