Memory Chip Self-Calibration for Faster Burn-In Parameter Testing
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Solution Overview
Problem
Current memory chip testing processes require significant time for scanning and data processing to determine optimal test options, which are then individually burned into each chip, prolonging the overall burn-in process.
Innovation Solution
A memory parameter calibration system and method that allows simultaneous testing of multiple chips with multiple test options, automatically determining the optimal calibration test option through a first and second test circuit block, and enabling simultaneous burn-in of these options across all chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional scanning and data processing methods are used to determine optimal test options, then measurement precision is improved, but loss of time worsens
Solution Approach 1:
The memory chip performs self-calibration by automatically determining its own optimal test options through internal test circuit blocks that evaluate multiple test options and select the best one without external intervention, eliminating the time-consuming external scanning and data processing steps while maintaining determination accuracy
Solution Approach 2:
The system pre-sets multiple test options (N test options where N>1) before the actual testing begins, allowing the memory chip to evaluate and select the optimal option during the burn-in process itself rather than requiring extensive preliminary scanning and analysis
2Manufacturing precision
If individual burn-in of optimal test options is performed for each memory chip, then manufacturing precision is improved, but loss of time worsens
Solution Approach 1:
Multiple memory chips are held on a single fixture and undergo burn-in simultaneously, with each chip independently using its self-determined optimal test option, thereby maintaining individual parameter optimization while dramatically reducing total burn-in time through parallel processing
3Measurement precision
If multiple test options are sequentially tested with external data processing, then measurement precision is improved, but device complexity worsens
Solution Approach 1:
The data processing function is extracted from the external memory test device and transferred to the memory chip itself through integrated test circuit blocks that automatically evaluate test options and determine optimal parameters, simplifying the external device while maintaining evaluation precision
Data Source
AI summary
A test system and a method for memory parameter calibration are provided. The test system includes a plurality of memory chips to be tested, a fixture, an input device, and a memory test device. The memory test device transmits a test command to the memory chips. Each memory chip includes a first test circuit block and a second test circuit block. The first test circuit block sequentially uses N test options to generate corresponding N original signal groups based on the test command and performs signal processing on each of the N original signal groups according to test parameters selected to be calibrated to generate N compensation amounts respectively corresponding to the N test options. The second test circuit block one by one filters for an optimal compensation amount from the N compensation amounts to provide a test option corresponding to the optimal compensation amount as a calibration test option.