Memory Device Self Refresh Calibration Timing
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Solution Overview
Problem
The transition of memory devices from self refresh mode to active mode is delayed due to the time-consuming calibration process of DQ termination resistance networks and driver settings, which negatively impacts the performance of computing systems by extending the time required to resume read or write operations.
Innovation Solution
Implementing periodic calibrations during self refresh mode, where the memory device recalibrates its DQ resistive network and driver settings at predetermined intervals (TD) within the self refresh mode, allowing the memory device to transition directly to active mode without an additional calibration step when exiting self refresh mode, leveraging improved self refresh control logic and timer circuitry to manage these recalibrations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory device performs calibration during transition from self refresh mode to active mode, then the calibration accuracy is maintained, but the transition time is extended
Solution Approach 1:
The patent applies preliminary action by performing calibration during self refresh mode before the memory device needs to transition to active mode. The calibration process is initiated in advance while the memory device is in self refresh state, so that when transition to active mode is required, the calibration is already complete or can be skipped, thereby reducing transition time while maintaining calibration accuracy.
Solution Approach 2:
The patent implements periodic action by performing calibration at predetermined intervals during self refresh mode. Instead of performing calibration only when transitioning to active mode, the system performs periodic calibrations during self refresh, which allows the calibration to be completed before transition is needed, thus resolving the contradiction between maintaining calibration accuracy and reducing transition time.
2Speed
If the memory device skips calibration when exiting self refresh mode, then the transition speed is improved, but the calibration accuracy may be compromised
Solution Approach 1:
The patent uses preliminary action to perform calibration during self refresh mode before the memory device transitions to active mode. This way, the calibration is completed in advance, and when the memory device needs to exit self refresh mode, it can transition directly without additional calibration steps, achieving both high transition speed and maintained calibration accuracy.
Solution Approach 2:
The patent implements feedback by monitoring whether calibration is needed based on the memory device's operational state. The system determines whether to perform calibration during self refresh mode or skip it when transitioning to active mode, using feedback from the operational state to make informed decisions about calibration timing, thus balancing transition speed with calibration accuracy.
3Reliability
If the memory device performs frequent calibrations during self refresh mode, then the calibration accuracy is maintained, but the self refresh efficiency is reduced
Solution Approach 1:
The patent applies periodic action by performing calibration at predetermined intervals during self refresh mode rather than continuously. This periodic approach maintains calibration accuracy at necessary intervals while minimizing the impact on self refresh efficiency, as calibration is performed only when needed based on the memory device's operational state and timing.
Solution Approach 2:
The patent implements dynamics by adjusting the calibration frequency and timing based on the memory device's operational state. The system dynamically determines when calibration is necessary versus when it can be skipped, optimizing the balance between maintaining calibration accuracy and preserving self refresh efficiency through adaptive, state-dependent calibration decisions.
Data Source
AI summary
A memory device is described. The memory device includes logic circuitry to perform calibrations of resistive network terminations and data drivers of the memory device while the memory device is within a self refresh mode.