Built-in Self Repair for Memory Using Dynamic Row Column Selection
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Solution Overview
Problem
Conventional memory repair methods have low success rates and incur high costs and longer run times due to their inability to effectively utilize redundancy arrangements, resulting in limited memory yield.
Innovation Solution
A built-in self-repair (BISR) method that employs a flowchart process to execute a built-in self-test (BIST) to identify faulty bits, calculate voting variables to compare row-first and column-first repair methods, and select the most efficient repair approach using redundant rows or columns, allowing for iterative repair until all faulty bits are addressed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory repair methods (row-first or column-first) are used, then the repair process is simple with less timing penalties, but the success rate is low and many defective memories cannot be repaired
Solution Approach 1:
The patent implements a dynamic repair method selection system that adapts to different defect patterns. The controller dynamically chooses between row-first repair, column-first repair, or block-based repair methods based on the specific defect distribution detected during testing, rather than using a fixed repair approach. This dynamic adaptation enables high repair success rates while maintaining operational simplicity through automated method selection.
Solution Approach 2:
The system changes the repair parameters (repair method type, block size, replacement strategy) based on the detected defect characteristics. By analyzing the defect map and selecting appropriate repair parameters, the system achieves high repair success rates without requiring complex manual configuration or multiple sequential repair passes.
2Reliability
If complex repair methods are used to repair difficult defective memories, then more memories can be repaired, but the testing costs increase and run times are longer
Solution Approach 1:
The system performs preliminary defect analysis and repair method selection before executing the actual repair process. By pre-evaluating the defect patterns and determining the optimal repair strategy in advance, the system avoids time-consuming trial-and-error repair attempts and directly applies the most efficient repair method, thereby reducing overall repair time while maintaining high yield.
Solution Approach 2:
The patent implements an optimized repair execution that skips unnecessary repair steps and directly applies the selected repair method to the identified defect blocks. This streamlined approach rushes through the repair process efficiently by eliminating redundant operations, achieving high memory yield without proportional increases in repair time.
3Reliability
If complex repair methods are used to repair difficult defective memories, then more memories can be repaired, but the testing costs increase
Solution Approach 1:
The system implements self-service through built-in self-test (BIST) and built-in self-repair (BISR) functionality. The memory controller autonomously performs defect detection, analyzes defect patterns, selects appropriate repair methods, and executes repairs without requiring external testing equipment or manual intervention. This self-service capability reduces testing costs while achieving high memory yield through automated intelligent repair.
Solution Approach 2:
The memory controller is designed with multi-functionality, serving both as the test execution unit and the repair control unit. This universal component handles defect detection, defect analysis, repair method selection, and repair execution, eliminating the need for separate specialized testing equipment and reducing overall manufacturing testing costs while maintaining high repair success rates.
Data Source
AI summary
A method for repairing a memory includes running a built-in self-test of the memory to find faulty bits. A first repair result using a redundant row block is calculated. A second repair result using a redundant column block is calculated. The first repair result and the second repair result are compared. A repair method using either the redundant row block or the redundant column block is selected. The memory is repaired by replacing a row block having at least one faulty bit with the redundant row block or replacing a column block having at least one faulty bit with the redundant column block.