Memory Self-Test Circuitry for Accurate Post-Repair Defect Location
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Solution Overview
Problem
Self-test circuits in memory devices, such as HBM, face challenges in accurately determining the physical location of defects after repair, leading to incorrect identification of defects during retesting, as the correspondence between logical and physical addresses is not maintained post-repair.
Innovation Solution
Incorporating circuitry within the self-test circuit that adjusts the correspondence between logical and physical addresses to match the pre-repair mapping, utilizing unused data paths from redundant memory locations to provide repair information and restore the original mapping, allowing accurate defect location identification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If repair is performed on memory devices, then defective column planes are corrected, but the correspondence between logical and physical addresses changes, causing incorrect defect location identification during retesting
Solution Approach 1:
The patent applies preliminary action by capturing and storing the pre-repair mapping between logical and physical addresses before the repair process alters the address correspondence. This stored pre-repair mapping is then used during retesting to accurately identify defect locations, preventing the information loss that would otherwise occur due to address mapping changes after repair.
2Productivity
If retesting is performed after repair, then defect detection capability is maintained, but incorrect physical location identification occurs due to altered address mapping
Solution Approach 1:
The patent introduces an intermediary mechanism in the form of stored pre-repair mapping information that mediates between the test circuit's logical address requirements and the physical reality after repair. This intermediary mapping allows retesting to proceed efficiently using logical addresses while accurately translating to the correct physical defect locations, thus maintaining both retesting efficiency and measurement precision.
3Ease of operation
If address mapping is updated after repair, then the memory device operates with correct current mapping, but the test circuit cannot accurately identify original defect locations
Solution Approach 1:
The patent captures and preserves the pre-repair address mapping information before any repair operations alter the address correspondence. This preliminary capture of mapping information ensures that even though the memory device operates with updated correct mapping after repair, the original defect location information is retained and can be used for accurate defect identification during retesting.
Data Source
AI summary
Self-test circuits of memory devices disclosed herein may include circuitry that adjusts the correspondence between logical and physical addresses to match pre-repair mapping of memory locations. That is, if a memory device has been repaired by remapping logical addresses to new physical addresses, the circuitry of the test circuit restores the pre-repair mapping of the memory device in some examples. In some examples, an unused global column redundancy data path may be repurposed to provide repair information to the self-test circuit to implement the pre-repair mapping.