Multi-Stage Memory Sense Amplifier Timing Control
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Solution Overview
Problem
Existing memory devices face challenges in achieving stable performance due to timing mismatches and difficulties in pre-charging data lines to expected voltage levels during the sensing process.
Innovation Solution
A memory device with a multi-stage sense amplifier configuration, including a first and second sensing circuit, an isolation circuit, and a control circuit that optimizes the timing of control signals to correctly match and disconnect data lines during pre-charging and sensing phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single-stage sense amplifier is used, then the device complexity is low, but the measurement precision and reliability of data signal amplification are insufficient
Solution Approach 1:
The sensing circuit is divided into a first sensing circuit and a second sensing circuit, where the first sensing circuit amplifies the data signal to generate a first sensing signal, and the second sensing circuit amplifies the first sensing signal to generate a second sensing signal. This two-stage segmentation improves measurement precision while managing device complexity through functional division.
2Manufacturing precision
If data lines are connected during pre-charging phase, then the pre-charging operation is simplified, but timing mismatches occur and voltage levels cannot be accurately controlled
Solution Approach 1:
The isolation circuit performs preliminary disconnection of the first and second data lines during the pre-charging phase before the sensing operation begins. This preliminary action ensures that the data lines are properly isolated and charged to expected voltage levels, preventing timing mismatches and ensuring accurate voltage control.
Solution Approach 2:
The isolation circuit acts as an intermediary between the first and second data lines, controlling their connection and disconnection based on the phase of operation. This intermediary component enables precise voltage level control by mediating the interaction between different circuit stages.
3Speed
If the sensing phase and pre-charging phase overlap, then the operating speed is improved, but timing mismatches and voltage control issues occur
Solution Approach 1:
The sensing operation is divided into periodic phases: a pre-charging phase where the isolation circuit disconnects the data lines for charging, and a sensing phase where the isolation circuit connects the data lines for signal amplification. This periodic action ensures proper timing and voltage control while maintaining high operating speed through efficient phase transitions.
Data Source
AI summary
Examples of the present application provide a memory device and operating method thereof, a memory system, and a sensing circuit. Wherein the memory device includes: an array of memory cells; a first sensing circuit coupled to the array of memory cells through a first pair of data lines; a second sensing circuit coupled to the first pair of data lines through a second pair of data lines; an isolation circuit located between the first pair of data lines and the second pair of data lines; a control circuit configured to: in the first sensing phase, control the first sensing circuit to amplify the data signal to the first sensing signal, and control the isolation circuit to connect the first pair of data lines and the second pair of data lines.