Memory Device Sense Operation Period Feedback
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Solution Overview
Problem
Existing memory systems face challenges in maintaining operation speed due to inefficiencies in detecting the completion of sensing operations in NAND flash memory chips, leading to increased costs, power consumption, and read latency.
Innovation Solution
The implementation of a memory system that includes a data latch, a nonvolatile memory cell array, and a control circuit. The control circuit manages information about the operation period of the sense operation and outputs this information to a memory controller in response to an inquiry, allowing for more accurate estimation of sensing operation completion times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the memory controller continuously monitors the sensing operation status to detect completion, then the read operation speed is improved, but the power consumption increases
Solution Approach 1:
The memory controller performs periodic polling of the sensing operation status rather than continuous monitoring. The control circuit outputs status information at predetermined intervals, allowing the memory controller to check completion at specific moments without constant power consumption, thus resolving the contradiction between speed and energy use.
Solution Approach 2:
The control circuit provides feedback information about the sensing operation status to the memory controller. This feedback mechanism allows the memory controller to accurately detect completion without needing continuous monitoring, enabling efficient status checking with reduced power consumption through targeted information retrieval.
2Measurement precision
If the memory controller uses frequent polling to check sensing operation status, then the detection accuracy is improved, but the cost and power consumption increase
Solution Approach 1:
The control circuit within the memory device autonomously manages the sensing operation status and provides information on demand. This self-service approach eliminates the need for complex external monitoring circuits and frequent polling mechanisms, reducing overall system cost while maintaining accurate detection through efficient internal state management.
3Reliability
If the memory controller waits for sensing operation completion before initiating read, then the data accuracy is improved, but the read latency increases
Solution Approach 1:
The memory controller initiates the read operation command before the sensing operation is fully complete. The control circuit continues managing the sensing operation in the background while the memory controller proceeds with read preparation, effectively overlapping these operations. This preliminary action ensures data accuracy is maintained while significantly reducing the waiting time and overall read latency.
Data Source
AI summary
A memory device includes a data latch, a nonvolatile memory cell array, and a control circuit configured to: manage information about an operation period of a sense operation, the sense operation being an operation in which the control circuit reads data stored in the nonvolatile memory cell array into the data latch, and in response to an inquiry instruction from a memory controller, output, to the memory controller, the information about the operation period of the sense operation.