Memory Sensing Circuitry for In-Memory Comparison Operations
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Solution Overview
Problem
Existing memory systems require significant power and time to perform comparison operations, as they often necessitate transferring data between memory arrays and processing resources via buses, which can be inefficient and power-intensive.
Innovation Solution
The implementation of sensing circuitry within memory arrays that allows for comparison operations to be performed directly on data stored in memory cells without transferring data via input/output lines, using logical operations like AND, OR, SHIFT, and INVERT to compare vectors and store results back within the array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If data is transferred between memory arrays and processing resources via buses to perform comparison operations, then the operations can be executed using external processing units, but the power consumption and time required increase significantly
Solution Approach 1:
The patent merges the memory array with sensing circuitry that includes logical operation units (AND, OR, SHIFT, INVERT) and comparison units, allowing comparison operations to be performed directly within the memory structure without external data transfer, thereby reducing power consumption while maintaining operational capability
Solution Approach 2:
The patent extracts the comparison function from external processing resources and embeds it directly into the memory array's sensing circuitry, eliminating the need for data transfer over buses and reducing the energy required for comparison operations
2Ease of operation
If data is transferred between memory arrays and processing resources via buses to perform comparison operations, then the operations can be executed using external processing units, but the computational time increases
Solution Approach 1:
The patent merges the memory array with sensing circuitry that includes logical operation units (AND, OR, SHIFT, INVERT) and comparison units, allowing comparison operations to be performed directly within the memory structure without external data transfer, thereby reducing computational time while maintaining operational capability
Solution Approach 2:
The patent segments the comparison operation into multiple parallel stages (logical operations followed by comparison), allowing simultaneous processing of multiple data elements within the memory array, which significantly reduces the overall computational time required
3Productivity
If sensing circuitry with logical operation units is integrated within the memory array to perform comparison operations directly, then power consumption and computational time are reduced, but the device complexity increases
Solution Approach 1:
The sensing circuitry is designed with multi-functional logical operation units (AND, OR, SHIFT, INVERT) that can perform various logical operations in addition to comparison functions, allowing the same hardware structure to serve multiple purposes and justifying the increased complexity through enhanced versatility
Solution Approach 2:
The patent merges the memory array with sensing circuitry that includes logical operation units (AND, OR, SHIFT, INVERT) and comparison units, allowing comparison operations to be performed directly within the memory structure without external data transfer, thereby reducing power consumption while maintaining operational capability
Data Source
AI summary
Examples of the present disclosure provide apparatuses and methods related to performing comparison operations in a memory. An example apparatus might include a first group of memory cells coupled to a first access line and configured to store a first element. An example apparatus might also include a second group of memory cells coupled to a second access line and configured to store a second element. An example apparatus might also include sensing circuitry configured to compare the first element with the second element by performing a number of AND operations, OR operations, SHIFT operations, and INVERT operations without transferring data via an input/output (I/O) line.


