Semiconductor Memory Sensing Control Circuit for Threshold Voltage Accuracy

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Solution Overview

Problem

The deterioration of physical and electrical properties in semiconductor memory devices due to repeated program and erase operations leads to decreased reliability, as the threshold voltage levels shift and the erase verification level shows a downward tendency, affecting the erase voltage and electrical properties of memory cells.

Innovation Solution

A semiconductor memory device with a sensing control circuit that differentially sets the level of the sensing current for erase and program verification operations, using a sensing voltage generator to control the bit line voltage and evaluation time, allowing for proportional sensing current levels to accurately sense the threshold voltage of selected memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the same erase verification voltage is supplied to all memory cell gates, then the sensing operation is simplified, but the threshold voltage sensing accuracy deteriorates due to back pattern dependency effect

Engineering Contradiction:
Improvesensing operation simplicityVSAvoidthreshold voltage sensing accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent applies local quality by differentiating the verification voltage based on the operational mode (program or erase) and the specific memory cell state. Instead of using a uniform verification voltage for all cells, the system supplies a program verification voltage (higher than read pass voltage) for program operations and an erase verification voltage (lower than read pass voltage) for erase operations, thereby accurately sensing threshold voltages in different states without compromising sensing simplicity

Inventive Principle:
Principle #3Local quality

2Loss of energy

If the erase verification level is gradually lowered, then the sensing current level can be reduced, but the erase voltage must be gradually raised which deteriorates memory cell electrical properties

Engineering Contradiction:
Improvesensing current consumptionVSAvoidmemory cell electrical properties
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent implements dynamics by making the verification voltage adaptive rather than fixed. The verification voltage is dynamically selected based on the operational mode (program or erase) and the current state of the memory cell. This allows the system to use lower sensing currents for erase operations while maintaining reliable threshold voltage sensing, thereby reducing energy consumption without compromising cell reliability

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the verification voltage parameter based on operational requirements. By supplying a program verification voltage higher than read pass voltage for program operations and an erase verification voltage lower than read pass voltage for erase operations, the system optimizes sensing current levels while maintaining accurate threshold voltage measurement, thus reducing energy consumption without degrading memory cell properties

Inventive Principle:
Principle #35Parameter changes

3Productivity

If repeated program and erase operations are performed, then data storage capacity is increased, but the threshold voltage level shifts and electrical properties deteriorate

Engineering Contradiction:
Improvedata storage capacityVSAvoidelectrical properties
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback by performing verification operations after each program or erase operation to check the threshold voltage state. The verification process uses mode-specific voltages (program verification voltage for program operations, erase verification voltage for erase operations) to accurately assess the memory cell state, enabling the system to adjust subsequent operations based on the actual cell condition, thereby maintaining reliability over repeated cycles

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8526239B2Semiconductor memory device and method of operating the same
Publication Date: 2013.09.03 SK HYNIX INC
  • US8526239B2 patent drawing
  • US8526239B2 patent drawing
  • US8526239B2 patent drawing

AI summary

A semiconductor memory device includes a memory string coupled to a bit line, a page buffer configured to sense a sensing current of the bit line in an erase verification operation or a program verification operation, and a sensing control circuit configured to differently set a level of the sensing current in the erase verification operation and the program verification operation in order to sense the threshold voltage level of a selected memory cell of the memory string.