Non-volatile Memory Sensing via Bit Line Discharge Timing
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Solution Overview
Problem
Conventional non-volatile memory devices require multiple read operations and increased circuit complexity to sense multi-level data, leading to inefficiencies and noise issues due to the need for multiple reference voltage levels.
Innovation Solution
A non-volatile memory device and sensing method that detect the difference in time when a precharged bit line is discharged in response to a cell resistance value, using a clock-pulse-shaped sensing enable signal to reduce the number of read operations and implement a simple verification control mechanism, thereby minimizing circuit area and noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional multiple read operations are used to sense multi-level data, then data sensing accuracy is improved, but device complexity and noise increase
Solution Approach 1:
The patent applies periodic action by using a clock-pulse-shaped sensing enable signal that periodically activates the sense amplifier at specific time intervals. This allows the system to capture resistance state information at multiple discrete moments within a single read operation cycle, effectively performing multiple measurements without requiring multiple separate read operations. The periodic pulsing of the sensing enable signal enables the sense amplifier to sample the bit line voltage at different time points, capturing the discharge characteristics that indicate different resistance states.
Solution Approach 2:
The patent implements preliminary action by precharging the bit line to a predetermined voltage level before the sensing operation begins. This precharging step prepares the bit line in a known initial state, allowing the subsequent discharge through the memory cell to be properly measured and compared. The precharge operation ensures that when the sensing enable signal activates the sense amplifier, the bit line is already in the correct state for accurate resistance measurement, eliminating the need for repeated read operations to establish baseline conditions.
2Measurement precision
If multiple reference voltage levels are used for sensing multi-level data, then measurement precision is improved, but object-generated harmful factors increase
Solution Approach 1:
The patent extracts the essential measurement information by focusing solely on the discharge time characteristic of the bit line voltage rather than comparing against multiple reference voltage levels. By taking out the timing information from the discharge process and using it as the primary sensing parameter, the system can determine resistance states without requiring multiple reference voltages. This extraction of timing information eliminates the noise and complexity associated with generating and managing multiple reference voltage levels while preserving the ability to distinguish between different resistance states.
Solution Approach 2:
The patent transitions from a voltage-dimension measurement approach to a time-dimension measurement approach. Instead of comparing bit line voltage against multiple reference voltage levels (voltage dimension), the system measures the discharge time of the bit line voltage (time dimension). This dimensional change allows the system to sense multi-level data using temporal information rather than multiple voltage levels, thereby reducing noise and simplifying the reference voltage generation circuitry while maintaining measurement precision.
3Measurement precision
If multiple read operations are performed, then data sensing accuracy is improved, but loss of time increases
Solution Approach 1:
The patent merges multiple measurement functions into a single read operation by using a clock-pulse-shaped sensing enable signal that activates the sense amplifier at multiple discrete time points within one operation cycle. This merging allows the system to perform what would traditionally require multiple separate read operations (for sensing different resistance states) into a single integrated operation, thereby reducing the total time required while maintaining the ability to accurately sense multi-level data through temporal sampling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for efficient sensing of multi-level data with reduced read operations and simplified control mechanisms, decreasing circuit area and noise, while accurately determining resistance states within a single read operation.
Implementation Method 1
the phase change material (PCM) layer 2 changes to a crystalline phase or an amorphous phase if heat is applied to the GST, thereby storing data in the memory cell
Implementation Method 2
If a voltage and a current are applied to the top electrode 1 and the bottom electrode 3, a current signal is provided to the PCM layer 2, and a high temperature is induced in the PCM layer 2
Data Source
AI summary
A non-volatile memory device and a sensing method thereof are disclosed, which can sense multi-level data using resistance variation. The non-volatile memory device includes a cell array and a sensing unit. The cell array includes a plurality of unit cells where data is read out or written. The sensing unit compares a sensing voltage corresponding to data stored in the unit cell with a reference voltage, amplifies/outputs the compared result, measures a difference in discharge time where the sensing voltage is discharged in response to a resistance value of the unit cell during an activation period of a sensing enable signal after a bit line is precharged, and senses the data in response to the measured result.