Memory Sensing Circuitry for In-Array Error Code Verification
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Solution Overview
Problem
Existing memory systems face inefficiencies in calculating and comparing error codes to detect data modifications within memory arrays, often requiring external processing resources and increased circuitry.
Innovation Solution
The implementation of sensing circuitry within memory arrays that can calculate and compare error codes independently, performing logical operations such as AND, OR, and SHIFT operations without transferring data via I/O lines, thereby reducing the need for external processing and circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error code calculation is performed by external processing resources, then data integrity monitoring is achieved, but device complexity and circuitry requirements increase
Solution Approach 1:
The patent combines the error code calculation function with the sensing circuitry already present in the memory array. The sensing circuitry, which normally reads data from memory cells, is enhanced to perform logical operations (AND, OR, SHIFT) and calculate error codes directly during the sensing operation, eliminating the need for separate external processing resources.
Solution Approach 2:
The sensing circuitry is designed to perform multiple functions: traditional data sensing/reading and error code calculation. By making the sensing circuitry universal, it can handle both data retrieval and integrity verification tasks, reducing the need for dedicated error detection hardware and lowering overall device complexity.
2Reliability
If error code calculation is performed by external processing resources, then data integrity monitoring is achieved, but processing time and productivity are reduced
Solution Approach 1:
The error code calculation is performed preliminarily during the data sensing operation itself, before data transfer to external processing resources. The sensing circuitry calculates error codes concurrently with reading data from memory cells, so that when data reaches external processors, the error code verification is already complete, eliminating additional processing time.
Solution Approach 2:
The sensing circuitry maintains continuous operation by performing both data sensing and error code calculation in the same operational cycle. This continuous useful action eliminates idle time between data reading and error verification, improving overall processing throughput while maintaining data integrity monitoring.
3Ease of operation
If data is transferred via I/O lines for error code calculation, then external processing can be performed, but circuitry requirements and device complexity increase
Solution Approach 1:
The patent extracts the error code calculation function from external processing resources and relocates it to the sensing circuitry within the memory array. This extraction eliminates the need for data transfer via I/O lines for error calculation purposes, reducing circuitry requirements while preserving the capability for external processing of results.
Data Source
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AI summary
Examples of the present disclosure provide apparatuses and method for error code calculation. The method can include accessing a first error code for data stored in the memory cells at a controller, in response to executing a boot sequence. The method can also include calculating a second error code for the data without transferring data via an input/output, I/O, line of the sensing circuitry. An execution of operations to calculate the second error code are distributed between an execution of a different plurality of operations. The method can also include determining if the first error code and the second error code are a same error code and if they are not, halting further execution of operations via the sensing circuitry, launching execution of another different plurality of operations executable using the sensing circuitry and/or continuing to monitor the sensitive data.