Memory Cell Sensing With Dynamic Sense Time for Threshold Shift

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor memory devices face reliability issues due to threshold voltage shift during sensing operations, which affect the accuracy and efficiency of data reading and programming.

Innovation Solution

A sensing technique that dynamically sets the sense time based on the data state being sensed, discharging the sense node through a selected memory cell for a distinctive sense time to determine the threshold voltage relative to a reference voltage, with a CELSRC driver voltage set to approximately zero Volts, applicable during read and verify operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a fixed sense time is used during sensing operations, then the sensing process is simple and fast, but threshold voltage shift causes unreliable sensing results and uncorrectable errors

Engineering Contradiction:
Improvesensing operation reliabilityVSAvoidsensing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies dynamics by making the sense time variable rather than fixed. The sense time is dynamically adjusted based on the data state being sensed, allowing the sensing operation to adapt to different threshold voltage conditions and compensate for voltage shift, thereby improving reliability without excessive complexity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the sensing parameter (sense time) based on the data state. By associating each data state with a specific sense time and adjusting the sense time according to the threshold voltage range, the system compensates for threshold voltage shift and improves sensing reliability

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If the sense time is extended to compensate for threshold voltage shift, then sensing accuracy improves, but sensing speed and productivity decrease

Engineering Contradiction:
Improvethreshold voltage measurement accuracyVSAvoidsensing operation speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The sense time is made dynamic and data-state-dependent. Instead of using a uniformly extended sense time for all data states, the system selects specific sense times based on the data state being sensed, allowing optimized accuracy for each state while maintaining overall sensing speed

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the sense time parameter based on the data state's threshold voltage range. By associating each data state with an optimized sense time, the system achieves sufficient measurement precision for each state without unnecessarily extending the sensing operation for all states

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12578872B2Dynamic sensing scheme to compensate for threshold voltage shift during sensing in a memory device
Publication Date: 2026.03.17 SANDISK TECHNOLOGIES LLC
  • US12578872B2 patent drawing
  • US12578872B2 patent drawing
  • US12578872B2 patent drawing

AI summary

The memory device includes a memory block with a plurality of memory cells that are arranged in a plurality of word lines and a plurality of NAND strings, which are coupled to a plurality of sense nodes. Control circuitry is configured to perform a sensing operation on the memory cells of a selected word line of the plurality of word lines. During the sensing operation, the control circuitry determines a data state to be sensed and then sets a sense time as a function of the data state to be sensed. The control circuitry then applies a reference voltage to the selected word line and, for the sense time, discharges a selected sense node of the plurality of sense nodes through a selected NAND string of the plurality of NAND strings. The selected NAND string includes a selected memory cell of the plurality of memory cells.