Semiconductor Memory Device Sensing Timing Verification

Solution Overview

Problem

Conventional NAND flash memory systems face challenges in accurately reading data due to variations in power supply voltage and operating temperature, leading to incorrect data loading and output, as the timing of sensing enable signals is not appropriately set.

Innovation Solution

A semiconductor memory device comprising a maintaining circuit, a sensing circuit, an output circuit, and a verification circuit that verifies the operation margin of differential sensing amplifiers and adjusts the timing of sensing enable signals based on the verification result to ensure accurate data sensing and output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the timing of sensing enable signals is set based on conventional fixed timing control, then the device complexity is low, but the data reading accuracy deteriorates under power supply voltage and temperature variations

Engineering Contradiction:

Improvedata reading accuracyVSAvoidtiming control complexity

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The verification circuit performs preliminary verification of the operation margin before actual data reading operations. The timing control circuit pre-determines the optimal timing of sensing enable signals based on verification results, ensuring accurate data sensing under various operating conditions without adding complex real-time adjustment mechanisms.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The verification circuit provides feedback information about the operation margin to the timing control circuit. This feedback mechanism allows the timing control circuit to adjust the timing of sensing enable signals based on actual device performance, thereby improving data reading accuracy while maintaining relatively simple control logic through iterative optimization.

Inventive Principle:

Principle #23Feedback

2Reliability

If the timing of sensing enable signals is dynamically adjusted to improve data accuracy, then the data reading reliability improves, but the device complexity increases due to additional verification circuits and timing control mechanisms

Engineering Contradiction:

Improvedata reading reliabilityVSAvoidcircuit structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The verification circuit performs preliminary verification of the operation margin before actual data reading operations. The timing control circuit pre-determines the optimal timing of sensing enable signals based on verification results, ensuring accurate data sensing under various operating conditions without adding complex real-time adjustment mechanisms.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The verification circuit automatically determines the optimal timing parameters and provides this information to the timing control circuit. This self-service mechanism allows the system to adapt to process variations and environmental conditions without requiring complex external calibration or manual adjustment, thereby improving reliability while keeping the overall system manageable.

Inventive Principle:

Principle #25Self-service

3Measurement precision

If fixed timing control is used for sensing enable signals, then the device complexity remains low, but the data accuracy deteriorates under environmental variations

Engineering Contradiction:

Improvedata sensing accuracyVSAvoidadaptability to environmental variations

Core Design Contradiction:

Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The verification circuit performs preliminary verification of the operation margin before actual data reading operations. The timing control circuit pre-determines the optimal timing of sensing enable signals based on verification results, ensuring accurate data sensing under various operating conditions without adding complex real-time adjustment mechanisms.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The timing control circuit dynamically adjusts the timing parameters of sensing enable signals based on verification results from the verification circuit. This parameter adjustment mechanism allows the system to adapt to different operating conditions such as power supply voltage and temperature variations, thereby improving data sensing accuracy across various environmental conditions.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10490240B2Semiconductor memory device capable of correctly reading data

Publication Date: 2019.11.26 WINBOND ELECTRONICS CORP

AI summary

A semiconductor memory device is provided. The semiconductor memory device includes a maintaining circuit, a sensing circuit, an output circuit, and a verification circuit. The maintaining circuit is configured to maintain data read from a memory cell array and output the data to a data bus in response to a column selection signal. The sensing circuit is configured to sense the data on the data bus in response to at least one sensing enable signal. The output circuit is configured to output the data sensed by the sensing circuit. The verification circuit is configured to verify an operation margin of the sensing circuit and output a verification result. The timing of the at least one sensing enable signal is set according to the verification result of the verification circuit.