Memory Sub-System Sequencer Separation for Bandwidth Expansion

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Solution Overview

Problem

Conventional memory sub-systems face challenges in bandwidth expansion and form factor reduction due to the inclusion of a sequencer component within the controller, which increases the number of pins and routing complexity, compromising signal integrity and power consumption.

Innovation Solution

Separating the sequencer component from the controller and integrating it with memory components in an individual package, using a SerDes connection for higher bandwidth and reduced pin count, and manufacturing the sequencer in independent silicon with memory components in independent die to improve signal integrity and reduce form factor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the sequencer component is included within the controller, then the controller can manage memory operations, but the number of pins and routing complexity increases, compromising signal integrity and increasing power consumption

Engineering Contradiction:

Improvememory operation managementVSAvoidnumber of pins and routing complexity

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The controller is divided into two separate components: a controller chip and a sequencer chip. The controller chip handles high-level memory management operations, while the sequencer chip handles low-level timing and sequencing operations. This segmentation reduces the complexity of each individual component and allows for optimized signal routing between them through a dedicated interface, thereby improving signal integrity while maintaining management capabilities.

Inventive Principle:

Principle #1Segmentation

2Ease of operation

If the sequencer component is included within the controller, then the controller can manage memory operations, but power consumption increases

Engineering Contradiction:

Improvememory operation managementVSAvoidpower consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

By separating the sequencer from the controller into an independent chip, each component can be optimized for its specific function with dedicated power management. The sequencer chip can operate with lower power consumption for timing-critical operations, while the controller chip handles higher-power management tasks, overall reducing the power consumption of the memory sub-system.

Inventive Principle:

Principle #1Segmentation

3Speed

If the sequencer component is separated from the controller and integrated with memory components in an individual package, then bandwidth is enhanced and form factor is reduced, but device complexity increases

Engineering Contradiction:

ImprovebandwidthVSAvoiddevice complexity

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

The separation of the sequencer into an independent chip allows for optimized high-speed serial communication interfaces (such as SerDes) to be implemented between the controller and sequencer, as well as between the sequencer and memory components. This segmentation enables shorter trace lengths and dedicated high-bandwidth pathways, achieving enhanced bandwidth while the modular architecture actually reduces overall system complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The sequencer is merged with the memory components in an individual package, creating a tightly integrated unit. This merging reduces the form factor by eliminating the need for separate sequencer packaging and allows for shorter, more reliable signal traces between the sequencer and memory components, thereby enhancing bandwidth and reducing the overall device footprint.

Inventive Principle:

Principle #5Merging (Combining)

4Volume of moving object

If the sequencer component is separated from the controller, then form factor is reduced, but manufacturing complexity increases

Engineering Contradiction:

Improveform factorVSAvoidmanufacturing complexity

Core Design Contradiction:

Volume of moving objectVSEase of manufacture

Solution Approach 1:

The controller and sequencer are manufactured as separate chips that can be produced using optimized processes for each specific function. This segmentation allows each chip to be manufactured with tailored processes, and the final assembly is simplified through chip-level integration rather than requiring complex internal integration within a single chip, actually reducing manufacturing complexity while reducing form factor.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS11567817B2Providing bandwidth expansion for a memory sub-system including a sequencer separate from a controller

Publication Date: 2023.01.31 MICRON TECHNOLOGY INC

AI summary

A processing device can determine a configuration parameter based on a memory type of a memory component that is managed by a memory system controller. The processing device can receive data from a host system. The processing device can generate, by performing a memory operation using the configuration parameter, an instruction based on the data. The processing device can identify a sequencer of a plurality of sequencers that are collocated, within a single package external to the memory system controller, wherein each sequencer of the plurality of sequencers interfaces with a respective memory component. The processing device can send the instruction to the sequencer.