Nonvolatile Memory Sequential Read Circuit for Continuous Page Output
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Solution Overview
Problem
Conventional nonvolatile memory devices require additional page-based commands or addresses to perform sequential read operations, leading to inefficiencies in data output and increased overhead, particularly when handling large amounts of data.
Innovation Solution
A nonvolatile memory device with a control logic circuit, sequential address generator, address decoder, page buffer circuit, and input/output circuit that generates and outputs sequential addresses and data without the need for separate page-based commands or addresses, allowing continuous data output based on initial sequential read commands and information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional page-based read commands are used for sequential read operations, then data can be read from memory, but additional commands and addresses are required for each page, increasing overhead and reducing data output speed
Solution Approach 1:
The patent applies preliminary action by having the memory device generate and output sequential addresses automatically after receiving an initial sequential read command. The address generator circuit pre-calculates and sequentially outputs multiple page addresses without waiting for additional read commands from the memory controller, thereby reducing command overhead and improving data output speed for sequential read operations
2Loss of time
If separate read commands are sent for each page, then precise page selection is achieved, but the process requires multiple command invocations increasing time overhead
Solution Approach 1:
The patent implements self-service by enabling the memory device to autonomously generate sequential addresses and select pages without external intervention. The address generator circuit automatically produces the next page address in sequence and the row decoder automatically selects the corresponding page, allowing the memory device to serve itself during sequential read operations and eliminating the need for multiple command invocations from the memory controller
Data Source
AI summary
A nonvolatile memory device includes a control logic circuit that receives a read command from outside the nonvolatile memory device, a memory cell array which includes a plurality of memory cells connected to a plurality of word lines, an address generator that generates a plurality of addresses based on read information from the outside of the nonvolatile memory device, an address decoder sequentially selects a plurality of pages in at least one word line, which correspond to the plurality of addresses, a page buffer circuit that is connected to the memory cell array through a plurality of bit lines, and prepares a plurality of sequential data from memory cells connected to the selected pages by the address decoder, and an input/output circuit that continuously outputs the plurality of sequential data from the page buffer circuit to the outside of the nonvolatile memory device through data lines.


