ONON Sidewall Spacer Structure for Memory Leakage Blocking
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Solution Overview
Problem
Multi-time programmable (MTP) memory devices face data retention performance degradation due to current leakage paths forming in memory cell transistors, particularly through sidewall spacers, which affects the reliability of memory cells over numerous write cycles.
Innovation Solution
The implementation of alternating oxide and nitride layers in sidewall spacers, specifically an ONON structure in memory regions and an ONN structure in logic regions, to inhibit current leakage paths and enhance data retention performance without impacting logic device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional sidewall spacers are used in memory cell transistors, then device simplicity is maintained, but current leakage paths form through the sidewall spacers causing data retention degradation
Solution Approach 1:
The sidewall spacer is segmented into multiple thin films with alternating materials (oxide and nitride layers) rather than using a single conventional material. This segmentation creates multiple interfaces that block current leakage paths while maintaining the electrical isolation function of the sidewall spacer.
Solution Approach 2:
The sidewall spacer employs a composite structure combining oxide and nitride materials in alternating layers. This composite approach leverages the complementary properties of both materials to inhibit current leakage while preserving the necessary electrical characteristics for memory cell operation.
2Reliability
If alternating oxide and nitride layers are implemented in sidewall spacers, then current leakage is inhibited and data retention is improved, but manufacturing complexity increases
Solution Approach 1:
The fabrication process employs periodic deposition of oxide and nitride layers in an alternating sequence. This periodic action allows for systematic formation of the multi-layer structure using repeated cycles of deposition and etching, making the complex structure manufacturable through standardized process steps.
Solution Approach 2:
The invention controls the thickness parameters of individual oxide and nitride layers to optimize both the leakage blocking performance and the manufacturability. By carefully selecting layer thicknesses within specific ranges, the patent achieves effective current leakage inhibition while maintaining compatibility with existing manufacturing capabilities.
3Reliability
If ONON structure is used in memory regions, then data retention is enhanced, but device complexity increases compared to uniform structure
Solution Approach 1:
The alternating oxide-nitride-oxide-nitride (ONON) structure is applied locally only to sidewall spacers in memory cell regions where data retention enhancement is critical. Logic region transistors can use simpler sidewall spacer structures, allowing the complex ONON structure to be implemented only where needed to improve reliability without unnecessarily complicating the entire device.
Data Source
AI summary
A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.