Memory Signal Generation Circuit for Stable Pulse Width Control
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Solution Overview
Problem
Semiconductor memories exhibit variations in clock signal generation due to process corners, leading to deviations in signal pulse widths that may exceed specification limits, particularly in volatile memory technologies like DDR4, affecting reliability and performance.
Innovation Solution
A signal generating circuit and method that adjusts the pulse width of target signals using an internal clock signal and control signal, independent of process variations, by incorporating a clock module, controlling module, and generating module to stabilize the pulse width within specified ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a ring oscillator is used to generate clock signals in semiconductor memories, then the memory can operate at high speeds, but the pulse width of controlled signals varies with process corners and may exceed specification limits
Solution Approach 1:
The patent implements a dynamic adjustment mechanism where the signal generation circuit automatically adapts its parameters based on detected process corner conditions. The system transitions from a static ring oscillator to a dynamic system that modifies signal characteristics in real-time, using feedback from process characterization to maintain pulse width within specifications across different manufacturing variations
Solution Approach 2:
The patent changes operational parameters of the signal generation circuit based on detected process corners. By adjusting timing parameters, voltage levels, or circuit configuration according to the specific process corner identified, the system maintains consistent pulse width output despite manufacturing variations, directly addressing the contradiction between high-speed operation and manufacturing precision
2Manufacturing precision
If signal pulse widths are adjusted to compensate for process variations, then signal accuracy improves, but circuit complexity increases
Solution Approach 1:
The patent implements a self-characterizing and self-adjusting signal generation circuit that automatically detects its own process corner and compensates without external intervention. The system performs self-diagnosis of process variations and self-adjusts its operation, eliminating the need for complex external calibration equipment or manual adjustment mechanisms, thus improving signal accuracy while controlling circuit complexity
Solution Approach 2:
The patent incorporates feedback mechanisms where the output signal characteristics are monitored and fed back to the signal generation circuit. This feedback loop enables automatic compensation for process variations by adjusting generation parameters based on actual output measurements, achieving high signal accuracy through a relatively simple closed-loop control structure
Data Source
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AI summary
Embodiments of the present application disclose a signal generating circuit and method and a semiconductor memory. The signal generating circuit includes: a clock module, configured to receive an external clock signal to generate an internal clock signal; a controlling module, configured to generate a control signal according to the frequency of the external clock signal; and a generating module, connected with the clock module and the controlling module respectively, and configured to receive the internal clock signal, the control signal and a flag signal to generate a target signal. When the flag signal changes from a first level to a second level, the target signal is changed from a third level to a fourth level, and after the target signal maintains the fourth level for a target time length, the target signal is changed from the fourth level to the third level. The generating module is further configured to determine the target time length according to the internal clock signal and the control signal.