Memory Simulation Using Linear Element Approximation
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Solution Overview
Problem
Traditional circuit simulation tools, such as SPICE, are inefficient for simulating large memory designs due to the computational expense of modeling numerous non-linear elements, leading to slow processor execution times and high memory requirements.
Innovation Solution
A simulation method that replaces non-linear elements in inactive bit cells with linear elements, using a simplified model that approximates their behavior when the wordline is inactive, reducing the number of nonlinear elements to be simulated and allowing for faster and more accurate simulation of memory designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional SPICE simulation is used to simulate memory designs with many non-linear elements, then simulation accuracy is maintained, but processor execution time increases and simulation memory requirements increase
Solution Approach 1:
The memory simulation is divided into two distinct segments: active bit cells that require full non-linear simulation for accuracy, and inactive bit cells that use simplified linear models. This segmentation allows the simulator to apply different levels of detail appropriate to each segment's operational state, reducing overall computational burden while maintaining accuracy where needed.
Solution Approach 2:
Different simulation qualities are applied locally to different parts of the memory based on their operational state. Active bit cells receive high-fidelity non-linear simulation treatment, while inactive bit cells receive lower-fidelity linear approximation treatment. This local quality differentiation optimizes the balance between accuracy and computational efficiency.
2Measurement precision
If traditional SPICE simulation is used to simulate memory designs with many non-linear elements, then simulation accuracy is maintained, but simulation memory requirements increase
Solution Approach 1:
The simulation model is segmented to represent only the necessary bit cells rather than modeling all bit cells in full detail. By segmenting the memory into active and inactive regions and applying appropriate modeling fidelity to each, the overall memory footprint of the simulation is reduced.
Solution Approach 2:
Instead of creating full non-linear models for every inactive bit cell, the simulator uses simplified linear representations that capture the essential behavior. This copying approach with reduced fidelity for inactive cells significantly reduces the quantity of data required to represent the complete memory system.
3Productivity
If a simplified model with fewer non-linear elements is used, then processor execution time decreases, but simulation accuracy may be compromised
Solution Approach 1:
The simulation model dynamically adapts its complexity based on the operational state of each bit cell. When a bit cell transitions between active and inactive states, the simulator adjusts the modeling fidelity accordingly, using non-linear models when needed and linear approximations when appropriate. This dynamic adaptation maintains accuracy while optimizing simulation speed.
Data Source
AI summary
In one embodiment, a method comprises creating a simulation model for a column of bit cells in a memory, simulating the simulation model to generate a result; and displaying the result for a user. Each of the bit cells in the column is coupled to a different wordline, and the simulation model comprises one or more linear elements in place of a nonlinear element in each bit cell that is coupled to an inactive wordline. The one or more linear elements approximate a behavior of the nonlinear element while the wordline is inactive. A computer accessible storage medium storing a simulator that implements the method is contemplated, and the simulator itself is also contemplated, in various embodiments.