Memory Device Skipping Pre-Verify Operations

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Solution Overview

Problem

Conventional memory devices perform unnecessary verify operations during programming, leading to increased time requirements and reduced efficiency, even after a pre-verify operation has passed.

Innovation Solution

The memory device implements a control logic circuit that skips the pre-verify operation in subsequent program loops if the pre-verify operation has passed, only performing a main verify operation to maintain threshold voltage distribution accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the pre-verify operation is performed in every program loop, then the threshold voltage distribution accuracy is maintained, but the program operation time is increased

Engineering Contradiction:
Improvethreshold voltage distribution accuracyVSAvoidprogram operation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies the skipping principle by allowing the memory device to skip the pre-verify operation in subsequent program loops once it has been determined that the pre-verify operation has passed. The control logic circuit monitors the verification status and automatically skips redundant pre-verify operations, thereby reducing program operation time while maintaining threshold voltage distribution accuracy through the main verify operation.

Inventive Principle:
Principle #21Skipping (Rushing through)

2Loss of time

If the pre-verify operation is skipped in subsequent program loops, then the program operation time is reduced, but the threshold voltage distribution accuracy may be compromised

Engineering Contradiction:
Improveprogram operation timeVSAvoidthreshold voltage distribution accuracy
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent implements feedback by having the control logic circuit monitor the pre-verify operation results and use this information to control subsequent verify operations. When the pre-verify operation passes, the control logic circuit provides feedback to skip future pre-verify operations while ensuring the main verify operation is performed, thus maintaining accuracy while reducing time.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies preliminary action by performing the pre-verify operation in the first program loop to establish baseline verification status. This preliminary verification allows the system to determine subsequent operation patterns, enabling time reduction in later loops while maintaining necessary verification accuracy through the main verify operation.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the main verify operation is always performed, then the threshold voltage distribution accuracy is ensured, but the programming efficiency is reduced

Engineering Contradiction:
Improvethreshold voltage distribution accuracyVSAvoidprogramming efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies the skipping principle by allowing the system to skip redundant verify operations. Specifically, when the pre-verify operation has passed, the control logic circuit skips subsequent pre-verify operations, thereby improving programming efficiency while the main verify operation continues to ensure threshold voltage distribution accuracy.

Inventive Principle:
Principle #21Skipping (Rushing through)

Data Source

PatentUS11908532B2Memory device and method of operating the memory device
Publication Date: 2024.02.20 SK HYNIX INC
  • US11908532B2 patent drawing
  • US11908532B2 patent drawing
  • US11908532B2 patent drawing

AI summary

Provided herein is a memory device and a method of operating the memory device. The memory device includes a memory cell array including a plurality of memory cells, a peripheral circuit configured to perform a program operation for storing data in selected memory cells among the plurality of memory cells, and a control logic circuit configured to control the peripheral circuit to form threshold voltage distributions corresponding to target program states corresponding to the data to be stored in the selected memory cells, respectively, wherein the control logic controls the peripheral circuit to perform a main verify operation for any one of the target program states of the selected memory cells when a pre-verify operation for the any one of the target program states has passed.