Memory Device SLC-to-MLC Leapfrog Programming Without Erase
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Solution Overview
Problem
Existing memory devices face limitations in efficiently programming memory cells beyond a single bit per cell (SLC) format without erasing, leading to inefficiencies and potential errors in high-performance operations.
Innovation Solution
A hybrid programming technique that switches from SLC to MLC mode by 'leapfrogging' data states without erasing, and further to QLC mode if necessary, using a 'leapfrog' programming operation to directly program additional data states in memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory cells are programmed to SLC format only, then programming speed and reliability are improved, but storage capacity is limited
Solution Approach 1:
The memory device dynamically switches programming modes between SLC and MLC based on real-time capacity utilization. When SLC capacity is reached, the system transitions to MLC format for the same memory blocks, allowing continuous data writing without erasure while adapting to changing storage needs
Solution Approach 2:
The invention changes the data storage parameter from 1 bit per cell (SLC) to 2 bits per cell (MLC) by modifying the programming voltage levels and data state transitions. This allows the same physical memory blocks to store twice as much data when SLC capacity is exhausted
2Quantity of substance
If memory cells are erased before re-programming to extend capacity, then storage capacity is improved, but programming time and energy consumption increase
Solution Approach 1:
The system maintains continuous data writing operations by switching from SLC to MLC formatting without erasing memory blocks. This eliminates the time-consuming erase cycle while continuously utilizing memory capacity through format transformation
Solution Approach 2:
The memory controller proactively monitors SLC capacity utilization and initiates the format transition to MLC before complete exhaustion occurs, allowing seamless continuation of write operations without interruption or erasure cycles
3Quantity of substance
If multiple bits per cell (MLC) format is used from the beginning, then storage capacity is improved, but programming error rate increases
Solution Approach 1:
The system dynamically selects the optimal programming mode (SLC or MLC) based on current operational needs and capacity status. High-reliability SLC mode is used initially for critical data, transitioning to MLC mode only when SLC capacity is reached, thereby maintaining low error rates while maximizing capacity utilization
Data Source
AI summary
The techniques include a memory device receiving a data write instruction. The memory device programs the memory cells of the memory blocks to a one bit per memory cell (SLC) format with a first and second SLC data states. In response to the data programmed to the memory cells of the memory blocks reaching an SLC limit prior to completion of the data write instruction, without erasing the memory cells, the memory device programs at least some of the memory cells from the SLC format to a two bits per memory cell (MLC) format. When programming from the SLC format to the MLC format, the memory device inhibits programming of some of the memory cells in the first and second SLC data states to form a first MLC data state and programs other memory cells of the SLC data states to form second, third, and fourth MLC data states.