Memory Sleep-Exit Recovery for Stuck Power Mode Transitions
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Solution Overview
Problem
Memory systems experience increased latency and performance drops due to stuck conditions when interrupted during power down cycles, leading to inability to transmit or receive commands and inefficient power consumption.
Innovation Solution
A host system detects a stuck condition by timing the transition from active to sleep mode and initiates a hardware reset operation if the memory system fails to wake up, using a write protect pin to reset memory dies below a voltage threshold, thereby avoiding a full power cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a full power cycle is performed to resolve stuck conditions, then reliability is improved, but latency and startup time increase
Solution Approach 1:
The power cycle operation is segmented into two distinct phases: a rapid voltage cutoff phase that immediately stops power to the memory device, followed by a controlled voltage restoration phase. This segmentation allows the system to achieve reliable reset conditions while minimizing the time the memory device remains non-operational, thus resolving the contradiction between reliability and latency.
Solution Approach 2:
The system performs preliminary detection of stuck conditions by monitoring command transmission and reception status before initiating the power cycle. By detecting the stuck condition early and preparing the power cycle sequence in advance, the system reduces the overall latency associated with resolving the condition while ensuring reliable recovery.
2Reliability
If a full power cycle is performed to resolve stuck conditions, then reliability is improved, but power consumption increases
Solution Approach 1:
The power consumption issue is addressed by segmenting the power cycle into a brief voltage cutoff period followed by a controlled restoration period. The voltage is completely cut off during the reset phase to minimize energy consumption, then restored only when necessary to restore operation, thus achieving reliable reset with reduced overall power consumption compared to traditional prolonged power cycling.
3Use of energy by moving object
If the memory system enters sleep mode to conserve power, then power consumption is reduced, but stuck conditions may occur during transition
Solution Approach 1:
The system establishes preliminary communication protocols and command transmission mechanisms before the memory device enters sleep mode. This preliminary setup ensures that the host system can detect stuck conditions and initiate recovery procedures even when the memory device is in low-power state, thus maintaining reliability while allowing power savings from sleep mode operation.
Solution Approach 2:
The system implements feedback mechanisms that monitor the state transitions of the memory device during sleep mode entry and exit. By continuously monitoring command transmission status and reception acknowledgments, the system can detect when a stuck condition occurs during transition and trigger appropriate recovery actions, thereby maintaining reliability while utilizing power-saving sleep modes.
Data Source
AI summary
Methods, systems, and devices for host recovery for a stuck condition of a memory system are described. The host system may transmit a first command for the memory system to transition from a first power mode to a second power mode (e.g., low-power mode). In some cases, the host system may transmit a second command for the memory system to exit the second power mode shortly after transmitting the first command. The host system may activate a timer associated with a time-out condition for exiting the second power mode and may determine that a duration indicated by the timer expires. In some examples, the host system may transmit a third command for the memory system to perform a hardware reset operation based on determining that the duration of the timer expires.