Memory Sub-System Slow Program Detection by Plane Pulse Monitoring

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Solution Overview

Problem

Existing memory sub-systems face issues with slow program rates leading to unnecessary discarding of good blocks due to simultaneous multi-plane programming, causing cascading errors and inefficient resource management.

Innovation Solution

Implementing a memory sub-system that monitors and determines program pulse counts to detect slow programming, shifting from multi-plane to single-plane programming based on threshold pulse counts to accurately identify and decommission bad blocks, thereby preserving good blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If simultaneous multi-plane programming is used, then programming throughput is improved, but slow-programming blocks cause cascading errors and force discarding of good blocks

Engineering Contradiction:
Improveprogramming throughputVSAvoidblock identification accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the programming process by monitoring program pulse counts for individual blocks within planes. By dividing the simultaneous programming into trackable units with individual pulse counters, the system can identify slow-programming blocks without affecting other blocks, thus maintaining throughput while improving reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements feedback by continuously monitoring program pulse counts during simultaneous multi-plane programming. The controller receives pulse count information from each block and uses this feedback to identify slow-programming blocks, preventing cascading errors and preserving good blocks for future use.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If program pulse count monitoring is implemented, then slow-programming blocks are accurately identified, but system complexity increases

Engineering Contradiction:
Improveslow program detection accuracyVSAvoidmonitoring system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent makes the existing program counter circuitry multi-functional by having it serve both its traditional counting function and the additional function of slow-programming detection. This universal use of existing components achieves precise measurement without proportionally increasing system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The monitoring system leverages the existing program counter infrastructure already present in the memory controller for multi-plane programming. By repurposing these existing self-service components for dual purposes (counting and detection), the system achieves accurate slow-program detection without adding substantial new complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12511070B2Memory sub-system slow program detection
Publication Date: 2025.12.30 MICRON TECHNOLOGY INC
  • US12511070B2 patent drawing
  • US12511070B2 patent drawing
  • US12511070B2 patent drawing

AI summary

An example apparatus can include a program component. The program component can program each of a plurality of planes during different time periods subsequent to performing a multi-plane programming on a non-volatile memory array. The program component can monitor a program pulse count for each of the respective plurality of planes per super block. The program component can, in response to the program pulse count for a respective block within one of the plurality of planes being above a threshold pulse count, determine that the respective block is a bad block.