Non-Volatile Memory Soft-Bit Restoration to Reduce Fragmentation

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Solution Overview

Problem

Existing memory systems with non-volatile memories face challenges in efficiently managing and restoring soft bit data, leading to reduced storage capacity and reliability due to fragmentation and data deterioration.

Innovation Solution

A memory system that calculates and restores third soft bit data based on logical sum calculations using first and second soft bit data, along with first and second hard bit data, to enhance data recovery and manage memory blocks effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If soft bit data is not restored, then memory system operation is simple, but storage capacity and reliability are reduced due to fragmentation and data deterioration

Engineering Contradiction:
Improvedata integrityVSAvoiddata management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory controller performs preliminary restoration of soft bit data by calculating third soft bit data from first and second soft bit data before data deterioration becomes critical. This proactive approach prevents fragmentation and maintains data integrity without requiring complex restoration operations during failure conditions.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms where the memory controller continuously monitors data status and uses the calculated third soft bit data to restore degraded soft bit data. This feedback loop enables the system to maintain reliability by actively managing and restoring data based on real-time conditions.

Inventive Principle:
Principle #23Feedback

2Reliability

If soft bit data restoration operations are performed, then data integrity is maintained, but processing time and computational resources increase

Engineering Contradiction:
Improvedata recoveryVSAvoidrestoration processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory controller performs soft bit data restoration operations in advance during normal operation rather than waiting for data deterioration. By calculating third soft bit data from first and second soft bit data proactively, the system reduces the time required for restoration operations when actually needed, as the data is already prepared and validated.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If multiple read operations are performed to restore soft bit data, then data recovery accuracy improves, but storage capacity is reduced due to fragmentation

Engineering Contradiction:
Improvedata recovery accuracyVSAvoidstorage capacity
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The system merges multiple read operations into a unified restoration process where the memory controller calculates third soft bit data by combining first and second soft bit data. This merging approach maintains data recovery accuracy while reducing the overall impact on storage capacity by efficiently managing and consolidating data restoration operations rather than performing separate fragmented reads.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250342871A1Memory system and non-volatile memory
Publication Date: 2025.11.06 KIOXIA CORP
  • US20250342871A1 patent drawing
  • US20250342871A1 patent drawing
  • US20250342871A1 patent drawing

AI summary

According to an embodiment, a memory system comprising: a non-volatile memory including a plurality of memory cells each capable of storing at least a first bit and a second bit, and configured to calculate third soft bit data based on a logical sum calculation using at least first soft bit data corresponding to the first bit and second soft bit data corresponding to the second bit; and a memory controller configured to restore the first soft bit data and the second soft bit data based on at least first hard bit data corresponding to the first bit, second hard bit data corresponding to the second bit, and the third soft bit data.