Memory Sense Circuitry for LDPC Soft-Read Current Integration
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Solution Overview
Problem
The existing methods for generating probabilistic information in low-density parity check (LDPC) codes for error correction in memory devices require multiple read strobes, which increase power consumption, latency, and reduce memory response time, affecting interface bandwidth and compliance with timing requirements.
Innovation Solution
A method that uses current integration techniques to generate probabilistic information by performing multiple sense operations with varying strobe signals, categorizing memory cells based on threshold voltages to refine probabilistic information and improve error correction, while minimizing unnecessary read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple read strobes are performed to generate probabilistic information, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent applies partial action by performing a limited number of read strobes (e.g., 1-3 strobes) rather than exhaustive multiple strobes. The system determines whether additional read strobes are necessary based on initial sensing results, thereby generating sufficient probabilistic information for LDPC decoding while avoiding unnecessary power consumption from excessive read operations.
Solution Approach 2:
The patent changes the parameter of read strobe count dynamically based on sensing conditions. Instead of always performing a fixed large number of read strobes, the system adjusts the number of strobes performed based on whether error correction is needed and the confidence level of initial readings, thereby optimizing the balance between error correction capability and power consumption.
2Reliability
If multiple read strobes are performed to generate probabilistic information, then error correction capability is improved, but latency increases
Solution Approach 1:
The system performs only the necessary number of read strobes to achieve error correction, rather than always performing a fixed large number. By evaluating initial sensing results and determining whether additional strobes are needed, the system reduces average latency while maintaining error correction capability.
Solution Approach 2:
The patent enables skipping unnecessary read strobes when error correction is not needed or when sufficient probabilistic information is already obtained from fewer strobes. This allows the system to rush through the sensing process efficiently when conditions permit, reducing latency without compromising reliability.
3Reliability
If multiple read strobes are performed to generate probabilistic information, then error correction capability is improved, but memory response time decreases
Solution Approach 1:
The system performs a partial number of read strobes based on actual needs rather than always performing maximum strokes. This selective approach maintains error correction capability while improving memory response time by avoiding unnecessary sensing operations.
4Reliability
If multiple read strobes are performed to generate probabilistic information, then error correction capability is improved, but interface bandwidth decreases
Solution Approach 1:
The patent applies partial action by performing only the necessary number of read strobes to generate sufficient probabilistic information for error correction. This reduces the total volume of data that must be transferred through the memory interface, thereby improving interface bandwidth and productivity while maintaining error correction capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and latency, enhances memory response time, and optimizes interface bandwidth by accurately generating probabilistic information with fewer read operations, thereby improving the efficiency of LDPC decoding.
Implementation Method 1
sense circuitry configured to perform current integration sensing to generate the probabilistic information
Data Source
AI summary
Methods and apparatuses for determining likelihood of erroneous data bits stored in a plurality of memory cells. A sense circuit to perform a coarse sense operation to detect first memory cells of the plurality of memory cells that stored charge sufficiently above a transition voltage threshold where the first memory cells are unlikely to be erroneous. The sense circuit further performs a fine sense operation to sense second memory cells of the plurality of memory cells having stored charge near the transition voltage between adjacent logic states. The first memory cells remain unsensed during the fine sense operation. The second memory cells detected during the fine sense operation may have an increased likelihood of being erroneous. Responsive to a number of sensed second memory cells near the transition voltage exceeding a threshold, additional sensing operations are performed by the sense circuit.