3D Memory Source Layer Grain Structure for Diffusion Stability
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Solution Overview
Problem
The integration density of semiconductor devices is limited by the area occupied by unit memory cells, and existing three-dimensional stacking methods do not adequately address the need for improved operational reliability and structural stability.
Innovation Solution
A semiconductor device structure featuring a first source layer with varying grain sizes and a gate structure, where a second part with a denser grain structure acts as a chemical diffusion barrier, enhancing the device's reliability and integration density through a manufacturing method involving the formation of alternating material layers and partial oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a three-dimensional stacking structure is used to improve integration density, then the area occupied by unit memory cells is reduced, but the operational reliability and structural stability are compromised
Solution Approach 1:
The source layer is designed with a dual-grain-size structure where a first region has a first grain size and a second region has a second grain size different from the first grain size. This local differentiation provides structural stability and chemical diffusion barrier properties in specific regions while maintaining the three-dimensional stacking configuration for high integration density.
Solution Approach 2:
The source layer functions as a composite structure combining regions with different grain sizes within the same material layer. This composite approach enables the layer to simultaneously provide electrical conduction pathways and chemical diffusion barriers, enhancing both reliability and structural integrity in the 3D stacked architecture.
2Productivity
If a three-dimensional stacking structure is used to improve integration density, then the area occupied by unit memory cells is reduced, but the structural stability is compromised
Solution Approach 1:
The source layer is designed with a dual-grain-size structure where a first region has a first grain size and a second region has a second grain size different from the first grain size. This local differentiation provides structural stability and chemical diffusion barrier properties in specific regions while maintaining the three-dimensional stacking configuration for high integration density.
3Ease of manufacture
If uniform grain size is used in the source layer, then the manufacturing process is simpler, but the chemical diffusion barrier property is insufficient
Solution Approach 1:
The source layer is designed with a dual-grain-size structure where a first region has a first grain size and a second region has a second grain size different from the first grain size. This local differentiation provides structural stability and chemical diffusion barrier properties in specific regions while maintaining the three-dimensional stacking configuration for high integration density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure and manufacturing method improve the integration density and reliability of semiconductor devices by providing a stable structure and minimizing damage during processing, maintaining a rigid structure and uniform oxidation.
Implementation Method 1
a first source layer including a first part having a first grain size and a second part having a second grain size smaller than the first grain size
Implementation Method 2
forming a passivation layer by partially oxidizing the second part through the opening
Data Source
AI summary
A semiconductor device including a first source layer including a first part having a first grain size and a second part having a second grain size smaller than the first grain size, a gate structure on the first source layer, and a channel structure passing through the gate structure and the second part of the first source layer.