3D Memory Common Source Line Resistance Reduction
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Solution Overview
Problem
The reliability of read operations in 3D structured semiconductor memory devices is compromised due to high resistance in common source lines, leading to reduced current flow and potential voltage failures during data access.
Innovation Solution
The semiconductor memory device architecture includes memory blocks with memory strings stacked in layers, where odd-numbered and even-numbered layers share bit lines and common source lines, and an operation circuit that supplies voltages to selected memory strings while turning on semiconductor devices of unselected memory strings to create additional current paths during read operations, thereby reducing the impact of common source line resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory strings are stacked in multiple layers with shared common source lines, then data storage capacity is increased, but read operation reliability deteriorates due to high resistance in common source lines
Solution Approach 1:
The patent segments the common source line into multiple independent source lines, each serving specific memory blocks. This segmentation reduces the resistance of each individual source line by limiting its length and scope, thereby improving read operation reliability while maintaining the 3D stacked memory structure that increases storage capacity.
Solution Approach 2:
The patent introduces selection transistors as intermediary elements between memory strings and source lines. These transistors enable selective connection of specific memory strings to specific source lines, allowing the system to bypass high-resistance paths and maintain reliable read operations in the stacked memory architecture.
2Device complexity
If odd-numbered and even-numbered layers share bit lines and common source lines, then device complexity is reduced, but voltage discharge capability deteriorates during read operations
Solution Approach 1:
The patent segments the shared line structure by assigning different source lines to odd-numbered and even-numbered memory blocks. This segmentation allows independent voltage discharge paths for different layer groups, preventing voltage interference while maintaining the simplified line sharing architecture within each group.
Solution Approach 2:
The patent resolves the voltage discharge conflict by operating on different spatial dimensions - odd-numbered blocks in one dimension use one set of source lines while even-numbered blocks in another dimension use a separate set. This dimensional separation enables both line sharing and independent voltage control.
Data Source
AI summary
A semiconductor memory device includes stacked memory strings in which at least some adjacent memory strings share a common source line. During a read operation for a selected memory string, a first current path is formed from a bit line of the selected memory string to the common source line through the selected memory string. A second current path is formed from the bit line of the selected memory string, through the common source line, to a bit line of an adjacent unselected memory string. This reduced path resistance enhances device reliability in read mode.


