3D Semiconductor Memory Source Line Separation for Data Reliability
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Solution Overview
Problem
Existing semiconductor memory technologies face challenges in improving the reliability of data stored in memory cells, particularly due to issues with noise components in the source line and the need for efficient separation of conductors between adjacent planes.
Innovation Solution
The semiconductor memory design incorporates a source line separation region between planes to ensure electrical insulation of conductors, preventing noise component increases and enhancing data reliability. This is achieved through a specific stacked body structure with alternating conductors and insulators, and the use of columnar contacts and pillars for memory cell formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductors are arranged in adjacent planes without separation, then device complexity is reduced, but noise components increase and reliability deteriorates
Solution Approach 1:
The patent divides the conductor arrangement into separate stacked bodies (first stacked body and second stacked body) that are electrically insulated from each other. Each stacked body contains alternating conductors and insulators, creating distinct electrical domains that prevent noise coupling while maintaining organized structure.
Solution Approach 2:
Insulator layers are introduced as intermediary materials between adjacent conductors in the stacked bodies. These insulator layers act as mediators that electrically isolate conductors from adjacent planes, preventing direct electrical coupling and noise transmission while allowing close physical proximity for compact design.
2Reliability
If insulator layers are added between conductors, then electrical insulation improves, but manufacturing complexity increases
Solution Approach 1:
The insulator layers are formed as part of the preliminary stacking process before final conductor patterning. By pre-establishing the alternating insulator-conductor stack structure, the patent simplifies subsequent manufacturing steps and ensures proper electrical insulation is built-in from the outset rather than added as a separate complex process.
Data Source
AI summary
A semiconductor memory includes first to fourth stacked bodies. The first stacked body includes a first conductor, and an alternating stack of first insulators and second conductors above the first conductor in a region. The second stacked body includes a third conductor, and an alternating stack of second insulators and fourth conductors above the third conductor in another region. The third stacked body includes a fifth conductor adjacent to the first conductor via a third insulator in a separation region. The fourth stacked body includes a seventh conductor adjacent to the third conductor via a fifth insulator in the separation region. The fifth conductor is electrically insulated from the seventh conductor.