Semiconductor Memory Device Source Potential Adjustment
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Solution Overview
Problem
In NAND flash memory, the ON cell current decreases over time due to degradation, leading to increased read-out errors as the number of programming and erasing cycles increases, making it difficult to maintain reliable data retrieval without excessive current consumption.
Innovation Solution
A semiconductor memory device with a source potential adjustment circuit, sense amplifier control circuit, and cell current sensing unit that compares the cell current to a reference current, controlling the bit line potential to maintain optimal current flow and reduce errors, using a positive CELSRC method to manage the source line potential and bit line voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If the number of programming and erasing cycles increases, then the memory device can be used longer, but the ON cell current decreases and read-out errors increase
Solution Approach 1:
The patent implements a feedback mechanism where the sense amplifier control circuit continuously monitors the cell current and adjusts the bit line potential accordingly. When the ON cell current decreases due to degradation, the control circuit modifies the bit line potential to compensate, maintaining reliable data retrieval throughout the device's lifespan.
Solution Approach 2:
The patent applies dynamic adjustment of bit line potential based on the operational state of the memory device. The control circuit dynamically modifies the bit line potential in response to changing cell current characteristics, allowing the system to adapt to degradation over time and maintain consistent read-out performance.
2Reliability
If higher current is used to maintain ON cell current, then read-out errors are reduced, but current consumption increases
Solution Approach 1:
The patent changes the bit line potential parameter dynamically to maintain optimal current flow through the memory cell. By adjusting this electrical parameter, the system achieves reliable data retrieval without requiring excessive current consumption, as the potential adjustment optimizes the current path rather than simply increasing overall current.
3Reliability
If the bit line potential is adjusted to maintain optimal current flow, then read-out errors are suppressed, but device complexity increases
Solution Approach 1:
The sense amplifier control circuit performs multiple functions: it senses the cell current, determines the memory cell state, and adjusts the bit line potential. This multi-functional approach achieves reliable data retrieval without adding separate dedicated circuits for each function, thereby limiting the increase in device complexity.
Data Source
AI summary
In general, according to one embodiment, a semiconductor memory device includes a first transistor, a plurality of memory cells and a controller. One end of the first transistor is electrically connected to a first power supply. The plurality of memory cells are electrically connected between other end of the first transistor and a second power supply. The controller is configured to apply a first voltage to a gate of the first transistor when reading data from a selected memory cell. The controller is configured to make the first voltage progressively-increasing.