Integrated Memory Source Structure With Support Blocks for Vertical NAND
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Solution Overview
Problem
Current methods for forming integrated memory devices, such as NAND memory, face challenges in efficiently creating vertically-stacked memory cell structures that maintain structural integrity and electrical conductivity, often resulting in issues like bending or toppling of layers during processing.
Innovation Solution
The method involves forming a conductive source structure with sacrificial material and support blocks, where the sacrificial material is removed to create voids, and conductively-doped semiconductor material is formed within these voids, with support blocks extending through the doped material to provide structural support and enhance conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertically-stacked memory cell structures are formed using conventional methods, then memory density is increased, but structural integrity deteriorates causing bending or toppling of layers
Solution Approach 1:
The memory device is divided into multiple vertically-stacked memory cell levels, with each level containing memory cells formed over a common source structure. This segmentation allows increased memory density while maintaining structural stability through modular organization of memory cells across multiple levels.
Solution Approach 2:
A common source structure is formed preliminarily before forming the vertically-stacked memory cell levels. This preliminary formation of the source structure provides a stable foundation that prevents bending or toppling of subsequent memory cell layers, ensuring structural integrity while enabling high-density vertical stacking.
2Quantity of substance
If vertically-stacked memory cell structures are formed, then memory capacity is increased, but manufacturing complexity increases
Solution Approach 1:
The common source structure serves multiple functions: it provides electrical connectivity for memory cells across multiple levels, acts as a mechanical foundation preventing structural deformities, and enables standardized fabrication processes. This multi-functionality increases memory capacity while managing manufacturing complexity through a unified structural approach.
3Stability of the object's composition
If support blocks are added to maintain structural integrity, then structural stability is improved, but device complexity increases
Solution Approach 1:
The support blocks are merged with the common source structure, forming an integrated structural unit. This merging provides structural stability to prevent bending or toppling of memory cell layers while avoiding the complexity of separate support components, as the source structure itself serves both electrical and mechanical functions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively supports the formation of vertically-stacked memory cells, preventing structural deformities and ensuring reliable electrical connectivity, thereby improving the integrity and performance of the memory device.
Implementation Method 1
Dopant is out-diffused from the doped semiconductor material into the channel material. The out-diffused dopant extends upwardly to at least one of the first levels.
Data Source
AI summary
Some embodiments include an integrated assembly having a source structure. The source structure includes, in ascending order, a first conductively-doped semiconductor material, one or more first insulative layers, a second conductively-doped semiconductor material, one or more second insulative layers, and a third conductively-doped semiconductor material. The source structure includes blocks extending through the second conductively-doped semiconductor material. Conductive levels are over the source structure. Channel material extends vertically along the conductive levels, and extends into the source structure to be in direct contact with the second conductively-doped semiconductor material. One or more memory cell materials are between the channel material and the conductive levels. Some embodiments include methods of forming integrated assemblies.