3D Memory Source Trench Structure for Stable High-Stack Etching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The stability of the manufacturing process for three-dimensional semiconductor memory devices is compromised as the number of stacked memory cells increases, leading to reduced integration and reliability.
Innovation Solution
A semiconductor memory device design featuring a semiconductor substrate with a source structure, metal structure, and memory cell strings, along with a method involving the formation of a source stack, insulating patterns, metal structure, and gate stacks to improve manufacturing stability and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked memory cells is increased to improve integration degree, then the integration degree is improved, but the stability of the manufacturing process deteriorates
Solution Approach 1:
The source structure is divided into multiple source regions (first source region, second source region, third source region) that are separately formed and connected to the substrate through individual metal structures. This segmentation allows each source region to be independently managed during manufacturing, reducing the complexity and improving the stability of the manufacturing process while maintaining a high number of stacked memory cells.
Solution Approach 2:
The patent transitions from a planar arrangement to a three-dimensional stacked architecture by vertically stacking multiple memory cells. The source structures extend in the horizontal direction while being connected to the substrate through vertical metal structures, enabling high integration density in the vertical dimension while managing manufacturing complexity through horizontal segmentation.
2Quantity of substance
If the number of stacked memory cells is increased to improve integration degree, then the integration degree is improved, but the reliability of the device deteriorates
Solution Approach 1:
The source structure is divided into multiple source regions (first source region, second source region, third source region) that are separately formed and connected to the substrate through individual metal structures. This segmentation allows each source region to be independently managed during manufacturing, reducing the complexity and improving the stability of the manufacturing process while maintaining a high number of stacked memory cells.
Solution Approach 2:
Metal structures serve as intermediary elements that connect the source regions to the substrate. These metal structures (first metal structure, second metal structure, third metal structure) provide reliable electrical connections and mechanical support, enhancing device reliability while enabling the stacked architecture.
3Manufacturing precision
If etching processes are performed to form structures, then the desired patterns are formed, but arcing phenomena occur reducing manufacturing stability
Solution Approach 1:
The source structures and metal connection structures are formed in advance before the gate stacks are constructed. This preliminary formation of source regions and their connections to the substrate establishes a stable foundation that prevents arcing phenomena during subsequent etching processes by providing proper electrical grounding and charge dissipation paths.
Solution Approach 2:
The metal structures connected to the substrate serve to dissipate accumulated charges during etching processes, converting the potentially harmful arcing phenomenon into a controlled electrical discharge path. This prevents manufacturing instability while maintaining the precision of pattern formation.
Data Source
AI summary
A semiconductor memory device includes a semiconductor substrate including an upper surface extending in a horizontal direction, a source structure including a trench extending in the horizontal direction, the source structure disposed above the semiconductor substrate, a metal structure in the trench of the source structure and connecting the source structure to the semiconductor substrate, and memory cell strings disposed on both sides of the trench and connected to the source structure.


