Memory System Error Correction via Spare Block Replacement
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Solution Overview
Problem
Existing semiconductor memory systems face challenges in efficiently managing faulty bits in EEPROMs due to tunnel insulating film degradation and charge trapping, leading to bit destruction, which increases with repeated program and erase operations, and existing error correction methods are complex and inefficient in handling increased error correction bits.
Innovation Solution
A data memory system with a non-spare area and a spare area, utilizing an error correction circuit that detects and corrects errors of at least two bits, allowing data from faulty pages to be error-corrected and programmed into spare pages, thereby reducing the occurrence of faulty bits without increasing the number of check bits and ensuring high-speed replacement operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction methods are enhanced to handle increased error correction bits, then reliability is improved, but device complexity increases
Solution Approach 1:
The memory array is divided into multiple memory cell blocks, with designated spare blocks reserved for replacement. This segmentation allows the error correction system to manage faults at the block level rather than requiring complex bit-level correction across the entire array, reducing overall system complexity while maintaining reliability.
Solution Approach 2:
Spare memory cell blocks are pre-configured and reserved before faults occur. When errors are detected in operational blocks, the system can immediately switch to pre-prepared spare blocks without requiring complex real-time correction algorithms, thereby improving reliability while keeping the error correction circuit relatively simple.
2Reliability
If more check bits are added to correct errors, then reliability is improved, but chip area increases
Solution Approach 1:
Instead of adding numerous check bits to every data block, the system creates copies of entire memory blocks in spare areas. When errors are detected, the faulty block is replaced by copying data from the spare block, achieving fault tolerance through replication rather than redundant checking, thus avoiding significant chip area expansion.
Solution Approach 2:
The system changes the approach from bit-level error correction (adding check bits) to block-level replacement (changing the operational state of memory blocks). This parameter change allows the system to achieve high reliability without proportionally increasing the chip area with additional check bits.
3Reliability
If replacement operations are performed frequently to maintain data integrity, then reliability is improved, but productivity decreases
Solution Approach 1:
Spare memory cell blocks are prepared in advance with valid data or in a ready state. When replacement is needed, the system can immediately switch to the pre-prepared spare block without performing time-consuming data transfer or initialization operations, thereby maintaining high reliability while minimizing the impact on productivity.
Solution Approach 2:
The system merges the operational memory blocks with spare blocks into a unified memory management structure. This allows replacement operations to be integrated into normal memory access operations, reducing the overhead and time penalty associated with frequent replacements, thus maintaining both reliability and productivity.
Data Source
AI summary
A data memory system includes a non-spare area having a plurality of memory cell blocks and containing pages, a spare area having a plurality of spare memory cell blocks in which data items are previously set to a certain value and containing pages, and a determination circuit which detects a data error of at least two bits when data is read out from the page of the non-spare area and determines the number of error bits in the readout page for each readout page. When the result of determination by the determination circuit indicates two or more bits, the contents of the readout page are error-corrected and programmed into the page of the spare area.