Memory Spare Cell Allocation for Fault Repair

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Solution Overview

Problem

In memory systems, conventional structures face challenges in efficiently repairing faults due to insufficient storage space for fault information, especially when a large number of faults occur in specific subarrays, leading to reduced repair probability and wasted storage space in other subarrays.

Innovation Solution

A memory management system and method that optimally distribute restricted spare cells into physical and virtual regions, using different spare cells for fault repair, and employing algorithms like column-first and row-first to repeatedly repair faults, ensuring that position information and fault addresses are stored efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If spare cells are allocated to each subarray individually, then fault repair can be performed within each subarray, but storage space for fault information becomes insufficient when many faults occur in specific subarrays

Engineering Contradiction:
Improvefault repair capabilityVSAvoidstorage space for fault information
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges multiple subarrays into a unified memory management structure where spare cells and fault information storage are shared across the entire memory system rather than being isolated to individual subarrays. This allows fault information from multiple subarrays to be consolidated, providing sufficient storage space even when many faults occur in specific subarrays.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent creates universal spare cells that can serve multiple subarrays simultaneously, rather than dedicating spare cells to single subarrays. This multi-functional approach allows the same spare cells to repair faults in different subarrays, maximizing the utilization of limited spare resources and storage space.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If spare cells are concentrated in subarrays with many faults, then fault repair probability increases in those subarrays, but storage space remains wasted in subarrays with fewer faults

Engineering Contradiction:
Improvefault repair probabilityVSAvoidwasted storage space
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent implements a dynamic fault information management system where fault information is selectively stored and managed based on actual fault conditions across different subarrays. The system dynamically allocates storage resources and spare cell usage according to the distribution and severity of faults, rather than using a static allocation scheme that wastes space in low-fault subarrays.

Inventive Principle:
Principle #15Dynamics

3Ease of manufacture

If conventional fault repair methods are used, then simple fault scenarios can be handled, but complex fault patterns with many faults in specific subarrays cannot be effectively repaired

Engineering Contradiction:
Improvefault repair simplicityVSAvoidfault repair effectiveness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent segments the memory system into multiple hierarchical levels including subarrays, intermediate arrays, and a top-level array, with corresponding segmented fault information management at each level. This segmentation allows the system to handle complex fault patterns by distributing fault repair tasks across different levels, maintaining simplicity in each segment while achieving high effectiveness for the entire system.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10776227B2Memory management system and method thereof
Publication Date: 2020.09.15 KOREA UNIV RES & BUSINESS FOUND
  • US10776227B2 patent drawing
  • US10776227B2 patent drawing
  • US10776227B2 patent drawing

AI summary

Disclosed are a memory management system and a method thereof. Restricted spare cells are optimally distributed (or allocated) into a physical region and a virtual region in a system for repairing a fault of a memory, thereby increasing a yield of a memory chip.