3D Memory Stack Connection Structure for Cell Current Retention
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Solution Overview
Problem
In semiconductor storage devices with a three-dimensional structure, forming holes in a stacked body with multiple conductive layers becomes increasingly difficult as the number of layers increases, leading to a potential decrease in cell current due to the strength of the fringe electric field and resistance issues in the connection portion.
Innovation Solution
Incorporating a high dielectric layer with a dielectric constant higher than the insulator between stacked portions, which facilitates hole formation and reduces resistance by enhancing the fringe electric field strength, thus preventing a decrease in cell current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked layers in the stacked body increases, then the storage capacity is improved, but the hole formation difficulty increases and cell current decreases
Solution Approach 1:
The stacked body is divided into multiple stacked portions (first stacked portion, second stacked portion, etc.) that are formed separately and then connected. This segmentation allows holes to be formed in each portion independently before connection, avoiding the difficulty of forming holes through the entire thick stacked body at once while achieving high storage capacity through multiple layers.
2Quantity of substance
If the number of stacked layers in the stacked body increases, then the storage capacity is improved, but the cell current decreases
Solution Approach 1:
A connection portion is introduced as an intermediary structure between the first stacked portion and the second stacked portion. This connection portion includes a high dielectric layer that strengthens the fringe electric field, ensuring adequate cell current flows through the connection region. This allows multiple stacked layers to be connected while maintaining reliable current flow, thus preserving storage capacity without current degradation.
3Ease of manufacture
If a conventional insulator is used in the connection portion, then the manufacturing is simpler, but the fringe electric field strength is insufficient causing cell current decrease
Solution Approach 1:
The dielectric constant parameter of the connection portion is changed by using a high dielectric layer with a dielectric constant higher than that of the conventional insulator. This parameter change strengthens the fringe electric field in the connection portion, enabling adequate cell current to flow through the stacked body with multiple layers while maintaining manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of a high dielectric layer in the connection portion allows for easier channel induction and reduces the need for high voltages, effectively preventing cell current degradation and improving hole formation efficiency in multi-layered semiconductor devices.
Implementation Method 1
there has been a possibility that the cell current is decreased in the semiconductor storage device manufactured by this method... Incorporating a high dielectric layer with a dielectric constant higher than the insulator between stacked portions, which facilitates hole formation and reduces resistance by enhancing the fringe electric field strength
Data Source
AI summary
A semiconductor device is provided, including: a substrate; a first stacked portion including a plurality of first electrode layers stacked in a first direction via a first insulator; a second stacked portion provided above the first stacked portion and including a plurality of second electrode layers stacked in the first direction via a second insulator; a connection portion provided between the first stacked portion and the second stacked portion, and including a third insulator; a column-shaped portion extending in the first stacked portion, the second stacked portion, and the connection portion in the first direction, and including a semiconductor body and a charge storage portion; and a semiconductor pillar provided between the substrate and the column-shaped portion, and in contact with the substrate and the semiconductor body of the column-shaped portion.