3D Memory Stack Nitride Barrier for Threshold Voltage Stability
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Solution Overview
Problem
Existing semiconductor memory devices with three-dimensionally arranged memory cells face issues with fluctuations in threshold voltage due to the diffusion of hydrogen ions from nitride layers during manufacturing, which affect the performance of p-channel MOS transistors.
Innovation Solution
Incorporating a nitride layer formed by physical vapor deposition (PVD) between the p-channel MOS transistor and the memory cell array, and another nitride layer formed by chemical vapor deposition (CVD) above it, to prevent the diffusion of hydrogen ions and maintain stable threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a nitride layer is used in the memory cell array structure, then the memory cell performance is improved, but hydrogen ion diffusion occurs during manufacturing causing threshold voltage fluctuations in p-channel MOS transistors
Solution Approach 1:
An oxide layer is introduced as an intermediary barrier between the nitride layer and the p-channel MOS transistor. This oxide layer prevents hydrogen ions from the nitride layer from diffusing into the transistor, thereby resolving the threshold voltage fluctuation issue while maintaining the memory cell performance benefits of the nitride layer.
Solution Approach 2:
The structure is segmented into distinct layers with different functions: the nitride layer serves the memory cell array while the oxide layer serves as a protective barrier for the p-channel MOS transistor. This segmentation allows each layer to optimize its specific function without interfering with the other.
2Ease of manufacture
If the semiconductor memory device structure is simplified, then the manufacturing process is easier, but threshold voltage fluctuations occur due to hydrogen ion diffusion
Solution Approach 1:
The oxide layer acts as a simple yet effective intermediary that blocks hydrogen ion diffusion. This adds minimal structural complexity while significantly improving threshold voltage stability, achieving a balance between manufacturing ease and device reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively prevents hydrogen ion diffusion, minimizing fluctuations in transistor threshold voltage and enhancing the reliability and performance of the semiconductor memory device.
Implementation Method 1
a first nitride layer formed by physical vapor deposition between the p-channel MOS transistor and the memory cell array
Implementation Method 2
a second nitride layer formed by chemical vapor deposition above the first nitride layer
Implementation Method 3
prevent the diffusion of hydrogen ions
Data Source
AI summary
According to an embodiment, a semiconductor memory device includes a semiconductor substrate, a control circuit arranged on the semiconductor substrate, and a memory cell array arranged above the control circuit. The memory cell array includes a plurality of three-dimensionally-arranged memory cells, and is controlled by the control circuit. A first nitride layer is arranged between the control circuit and the memory cell array, and a second nitride layer is arranged between the control circuit and the first nitride layer.