Variable Resistance Memory Stack for Low-Voltage Oxygen Vacancy Switching
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Solution Overview
Problem
Existing nonvolatile memory devices face challenges in achieving high integration, low power consumption, and wide resistance change characteristics at low applied voltages, particularly in resistance change devices.
Innovation Solution
A variable resistance memory device is designed with a capping layer that maintains oxygen vacancies in the variable resistance layer, using a material with a higher oxide formation energy than the resistance material, and a structure that includes a support layer, channel layer, and gate electrodes, allowing for improved resistance switching performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the resistance change device uses conventional materials and structures, then the device can operate, but the resistance change characteristics are insufficient at low applied voltages
Solution Approach 1:
The patent employs a composite structure consisting of a variable resistance layer (e.g., Ta2O5, TiO2, HfO2, or ZrO2) and a capping layer with higher oxide formation energy (e.g., Al2O3, HfO2, ZrO2, MgO, CaO, SrO, BaO, La2O3, Nd2O3, Eu2O3, CeO2, Sm2O3, Gd2O3, Sc2O3, Lu2O3, or Y2O3). This composite material system enables effective oxygen vacancy maintenance at the interface, achieving reliable resistance switching at low operation voltages (0.5V to 5V) while maintaining stable high and low resistive states.
2Reliability
If the variable resistance layer thickness is increased to improve resistance switching, then the resistance difference increases, but the operation voltage increases and integration density decreases
Solution Approach 1:
The patent optimizes the thickness parameters of both the variable resistance layer (1nm to 100nm) and the capping layer (2nm to 100nm) to achieve effective resistance switching. The capping layer thickness of at least 2nm is critical for maintaining sufficient oxygen vacancies. This parameter optimization enables adequate resistance difference (ratio between high and low resistive states) while keeping the total stack thickness minimal for high integration density.
3Reliability
If a thick capping layer is used to maintain oxygen vacancies, then the oxygen vacancy maintenance improves, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies local quality by positioning the capping layer with higher oxide formation energy specifically at the interface with the variable resistance layer where oxygen vacancy maintenance is most critical. The capping layer thickness is optimized to at least 2nm locally at this interface region, rather than uniformly thickening all layers. This localized approach maintains oxygen vacancies effectively while minimizing overall device complexity and manufacturing difficulty.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves enhanced resistance switching yield and reduced set/reset voltages, facilitating high integration and low power consumption.
Implementation Method 1
the capping layer may include an oxide that has an oxide formation energy having a greater absolute value than an absolute value of an oxide formation energy of the variable resistance material
Implementation Method 2
a variable resistance layer on the support layer and including a variable resistance material; a capping layer between the support layer and the variable resistance layer and being configured to protect the variable resistance layer
Data Source
AI summary
A variable resistance memory device includes a support layer including an insulating material; a variable resistance layer on the support layer and including a variable resistance material; a capping layer between the support layer and the variable resistance layer and protecting the variable resistance layer; a channel layer on the variable resistance layer; a gate insulating layer on the channel layer; and a plurality of gate electrodes and a plurality of insulators alternately and repeatedly arranged on the gate insulating layer in a first direction parallel with the channel layer. The capping layer may maintain oxygen vacancies formed in the variable resistance layer.