3D Memory Stack Separation Patterns to Prevent Layer Deformation
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Solution Overview
Problem
The increasing complexity of three-dimensionally arranged memory cells in semiconductor devices makes the process of forming these cells increasingly difficult, leading to challenges in maintaining the integrity of the multilayer structure and preventing deformation.
Innovation Solution
A semiconductor device design featuring a horizontal wiring layer with alternately stacked mold and wiring layers, channel structures extending through the stack, and separation patterns with varying widths, along with a lower support and sealing conductive layer to maintain structural integrity and facilitate the formation of non-volatile memory cells like VNAND or 3D flash memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensionally arranged memory cells are integrated to increase data storage capacity, then data storage capacity is improved, but the process complexity and difficulty of forming cells increases
Solution Approach 1:
The patent divides the stack structure into multiple mold layers and wiring layers that are alternately stacked. The separation patterns further segment the stack into distinct regions, making the formation process more manageable and less complex while maintaining high integration density.
Solution Approach 2:
The patent transitions from planar memory cell arrangement to three-dimensional vertical stacking. Memory cells are arranged vertically across multiple layers, dramatically increasing storage capacity per unit area while using systematic layer-by-layer formation processes.
2Quantity of substance
If three-dimensionally arranged memory cells are integrated to increase data storage capacity, then data storage capacity is improved, but deformation of multilayer structure occurs
Solution Approach 1:
The separation patterns have varying widths (first areas with smaller width and second areas with larger width) at different locations within the stack structure. This local variation in geometry provides differential mechanical support and stress distribution, preventing deformation while maintaining the integrity of the multilayer structure.
Solution Approach 2:
The stack structure comprises alternating mold layers and wiring layers with different material properties. This composite structure provides mechanical reinforcement and stress management, preventing deformation during fabrication and operation while enabling high-density integration.
3Stability of the object's composition
If separation patterns with varying widths are used, then deformation prevention is improved, but manufacturing precision requirements increase
Solution Approach 1:
The separation patterns are formed as part of the stack structure fabrication process itself, rather than as a separate post-processing step. The varying width features are incorporated during the layer-by-layer formation, allowing precision to be maintained through process integration rather than added complexity.
Data Source
AI summary
A semiconductor device including: a horizontal wiring layer; a stack structure including a plurality of mold layers and a plurality of wiring layers alternately stacked on the horizontal wiring layer; a plurality of channel structures extending through the stack structure; and a plurality of separation patterns extending through the stack structure, wherein each of the plurality of separation patterns includes a plurality of first areas and a plurality of second areas adjacent to the plurality of first areas, wherein each of the plurality of first areas has a smaller width than each of the plurality of second areas.