Semiconductor Memory Stack Geometry to Avoid Pillar-Plate Shorting
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Solution Overview
Problem
In semiconductor storage devices like three-dimensional nonvolatile memory, electrical contacts between layouts can adversely affect device characteristics, leading to inter-layout contact issues that compromise performance.
Innovation Solution
The semiconductor storage device features a stacked body with conductive and insulating layers, where the plate-shaped contacts and pillars have varying widths along the stacking direction, preventing inter-configuration contact by positioning maximum widths at different hierarchical levels, thereby avoiding short circuits during replace treatment processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If layouts are densely disposed in the stacked body, then storage capacity is enhanced, but inter-configuration contact occurs causing short circuits
Solution Approach 1:
The patent applies dimensional change by varying the width of plate-shaped contacts and pillars along the stacking direction (vertical dimension). The plate-shaped contacts have maximum width at different heights from the top surface, while pillars have maximum width at different heights from the bottom surface, creating a three-dimensional spatial arrangement that prevents contact while maintaining dense layout.
Solution Approach 2:
The patent employs asymmetry by making the width profiles of plate-shaped contacts and pillars asymmetric along the stacking direction. The plate-shaped contacts widen toward the top surface while pillars widen toward the bottom surface, creating complementary asymmetric shapes that interlock spatially without contact, thereby preventing short circuits in dense configurations.
2Ease of manufacture
If plate-shaped contacts and pillars have uniform widths, then manufacturing is simplified, but inter-configuration contact occurs
Solution Approach 1:
Instead of varying width in the horizontal plane, the patent varies width along the vertical stacking direction, adding a dimensional variable that prevents contact without complicating horizontal alignment processes. This approach maintains manufacturing simplicity while solving the contact problem.
Solution Approach 2:
The patent incorporates width variation into the formation process of plate-shaped contacts and pillars themselves, rather than requiring subsequent adjustment steps. The asymmetric width profiles are built-in during the initial stacking and formation processes, preventing contact before it can occur.
Data Source
AI summary
A semiconductor storage device includes a stacked body where a conductive layer and an insulating layer are stacked a multiple number of times; a plate-shaped portion extending along a stacking direction of the stacked body and a first direction and dividing the stacked body along a second direction; and a pillar penetrating the stacked body. A width of the plate-shaped portion in the second direction at the same height as a conductive layer located at the top is larger than a width of the plate-shaped portion in the second direction at the same height as a conductive layer located at the bottom, and a width of the pillar in the second direction at the same height as the conductive layer located at the top is smaller than a width of the pillar in the second direction at the same height as the conductive layer located at the bottom.