Vertical Memory Stack Slot Isolation to Prevent Current Leakage
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Solution Overview
Problem
Conventional methods for forming vertical memory arrays in non-volatile memory devices, such as NAND Flash memory, result in undesirable current leaks and short circuits due to inadequate isolation between conductive structures, leading to reduced memory device performance, reliability, and durability.
Innovation Solution
The implementation of dielectric-filled slots with isolation structures laterally interposed between them, which reduces micro-trenching, ion deflection, and overetching during slot formation, thereby enhancing the separation of conductive structures and preventing short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods of forming vertical memory arrays are used, then memory device fabrication can proceed with standard processes, but current leaks and short circuits occur due to inadequate isolation between conductive structures
Solution Approach 1:
The patent introduces dielectric material as an intermediary substance filling the slots between conductive structures. This dielectric material acts as a mediator that prevents direct electrical contact between adjacent conductive structures, thereby eliminating current leaks and short circuits while maintaining the vertical memory array architecture.
Solution Approach 2:
The patent segments the continuous dielectric structure into isolated regions by creating slots that are filled with dielectric material. This segmentation approach divides the conductive structures into electrically isolated units, preventing harmful current leakage between adjacent structures while maintaining individual structural integrity.
2Productivity
If feature packing densities are increased to improve memory density, then more memory cells can be packed in unit die area, but margins for formation errors decrease leading to short circuits between access lines
Solution Approach 1:
The dielectric-filled slots serve as intermediary isolation structures that provide robust electrical separation between access lines. This intermediary layer ensures that even when feature packing densities are increased and formation error margins are reduced, the dielectric material prevents short circuits between adjacent conductive structures.
Solution Approach 2:
The patent transitions from two-dimensional planar isolation to three-dimensional vertical isolation by filling vertical slots with dielectric material. This dimensional change provides additional isolation space in the vertical dimension, enabling tighter horizontal packing of features while maintaining adequate electrical separation through the vertical dielectric barrier.
3Ease of manufacture
If conventional slot formation methods are used, then processing can be simplified, but micro-trenching and overetching occur leading to conductive material depositions that cause leakage currents
Solution Approach 1:
The patent applies preliminary protective actions by introducing dielectric material to fill the slots before subsequent conductive material deposition processes. This preliminary filling prevents micro-trenching and overetching from causing harmful effects during later processing steps, as the dielectric material serves as a protective barrier that prevents unwanted conductive material depositions.
Solution Approach 2:
The dielectric-filled slots provide beforehand cushioning against the harmful effects of micro-trenching and overetching. By pre-filling the slots with dielectric material, the patent creates a cushioning layer that prevents these formation errors from leading to conductive material depositions and subsequent leakage currents, thereby protecting the device performance.
Data Source
AI summary
An electronic device comprises a stack comprising an alternating sequence of conductive structures and insulative structures arranged in tiers, and at least one dielectric-filled slot extending vertically through the stack and extending in a first horizontal direction. The at least one dielectric-filled slot is defined between two internal sidewalls of the stack. The electronic device comprises additional dielectric-filled slots extending vertically through the stack and extending in a second horizontal direction transverse to the first horizontal direction, and isolation structures laterally interposed between the at least one dielectric-filled slot and the additional dielectric-filled slots. The isolation structures are laterally adjacent to the conductive structures of the stack, and at least some of the isolation structures are vertically adjacent to the insulative structures of the stack. Related systems and methods of forming the electronic devices are also disclosed.