3D Memory Layer Stack Marks for Stress Alignment Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In three-dimensional memory devices, the stress differences between layers of varying materials can cause displacement of structures during manufacturing, leading to defects and reduced yield due to membrane stress and misalignment of features in dicing areas.

Innovation Solution

The provision of multiple mark portions in the layer stack and separators between them helps to alleviate stress and maintain structural alignment, allowing for the separation of regions with mark portions and reducing the overall volume of the layer stack, thereby minimizing displacement and defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If multiple mark portions are provided in the layer stack, then stress-induced displacement is reduced and manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvealignment precisionVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The layer stack is divided into multiple regions with mark portions distributed throughout its volume. This segmentation allows stress to be distributed and measured at multiple points, improving alignment precision without requiring a single complex stress management system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Mark portions serve as intermediary elements that indicate stress-induced displacement. By providing multiple mark portions throughout the layer stack, the system can detect and compensate for stress effects on alignment precision without directly managing the complex stress fields.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If separators are provided between mark portions, then stress is alleviated and manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvestructural alignmentVSAvoidlayer structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Separators divide the layer stack into distinct regions between mark portions. This segmentation isolates stress fields in different regions, preventing stress accumulation and maintaining structural alignment precision without requiring a monolithic complex structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Separators extract or remove stress concentration zones from the continuous layer stack. By placing separators between mark portions, the system eliminates potential stress pathways while maintaining the necessary structural integrity for alignment.

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If the volume of the layer stack is reduced, then stress-induced displacement is minimized and manufacturing precision is improved, but the quantity of functional layers is reduced

Engineering Contradiction:
Improvedisplacement controlVSAvoidlayer stack volume
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The layer stack volume is segmented into smaller regions separated by separators. This allows the overall volume to be reduced while maintaining functional integrity through distributed mark portions that monitor and control stress-induced displacement in each segment.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the layer stack are optimized with local quality variations. Mark portions and separators are strategically placed in regions where stress management is critical, allowing volume reduction in non-critical areas while maintaining precision in functional regions.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11824011B2Memory device and method of manufacturing memory device
Publication Date: 2023.11.21 KIOXIA CORP
  • US11824011B2 patent drawing
  • US11824011B2 patent drawing
  • US11824011B2 patent drawing

AI summary

According to one embodiment, a memory device includes: a first layer stack provided in a first area of a substrate; second and third layer stacks provided in a second area of the substrate; a memory cell provided in the first layer stack; a first mark portion provided in the second layer stack; a second mark portion provided in the third layer stack; and a first portion provided between the second layer stack and the third layer stack.