Memory Stack Thermal Sensor Data for Refresh Rate Control

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Solution Overview

Problem

3D stacked memory devices face challenges in managing thermal gradients, leading to inefficient refresh operations and increased power consumption due to the lack of thermal sensors in lower-cost memory devices, which makes it difficult to determine heat distribution and adjust refresh frequencies accordingly.

Innovation Solution

Incorporating thermal sensors in a logic chip to estimate thermal conditions of the memory stack, allowing the memory controller to adjust refresh rates based on temperature data, thereby optimizing performance and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If 3D stacked memory devices are increased in size to provide more dense memory, then memory capacity is improved, but temperature difference between inner and outer portions increases

Engineering Contradiction:
Improvememory capacityVSAvoidtemperature difference
Core Design Contradiction:
Quantity of substanceVSTemperature

Solution Approach 1:

The memory stack is divided into multiple memory elements (first memory element, second memory element, etc.) with different thermal characteristics. Each memory element can be independently monitored and controlled, allowing differential refresh operations based on local temperature conditions rather than treating the entire stack uniformly.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different refresh operations are applied to different memory elements based on their specific thermal conditions. The memory controller adjusts refresh frequencies locally for each memory element according to its temperature, rather than applying a uniform refresh rate to the entire memory stack. This allows optimal performance for each region while managing overall thermal constraints.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If thermal sensors are not included in lower cost memory devices, then manufacturing cost is reduced, but ability to determine heat distribution and adjust refresh operations deteriorates

Engineering Contradiction:
Improvemanufacturing costVSAvoidthermal monitoring capability
Core Design Contradiction:
Ease of manufactureVSDifficulty of detecting and measuring

Solution Approach 1:

A memory controller is introduced as an intermediary component that monitors thermal conditions of multiple memory elements and adjusts refresh operations accordingly. The controller acts as a central coordination point that can implement thermal management without requiring expensive thermal sensors in each memory element, thereby maintaining cost-effectiveness while enabling sophisticated thermal management.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system implements feedback-based thermal management where the memory controller continuously monitors the state of memory elements and adjusts refresh frequencies in response to thermal conditions. This feedback mechanism allows the system to adapt to changing thermal states and optimize performance while managing power consumption, without requiring direct thermal sensing in each memory element.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9396787B2Memory operations using system thermal sensor data
Publication Date: 2016.07.19 TAHOE RES LTD
  • US9396787B2 patent drawing
  • US9396787B2 patent drawing
  • US9396787B2 patent drawing

AI summary

Memory operations using system thermal sensor data. An embodiment of a memory device includes a memory stack including one or more coupled memory elements, and a logic chip coupled with the memory stack, the logic chip including a memory controller and one or more thermal sensors, where the one or more thermal sensors include a first thermal sensor located in a first area of the logic chip. The memory controller obtains thermal values of the one or more thermal sensors, where the logic element is to estimate thermal conditions for the memory stack using the thermal values, the determination of the estimated thermal conditions for the memory stack being based at least in part on a location of the first thermal sensor in the first area of the logic element. A refresh rate for one or more portions of the memory stack is modified based at least in part on the estimated thermal conditions for the memory stack.