Memory Stack Package Layout With Controller Through-Via Interconnects
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Solution Overview
Problem
Existing semiconductor stack packages face challenges in efficiently connecting and controlling multiple memory cell arrays and control circuits within a single package structure, leading to potential defects and increased complexity in manufacturing processes.
Innovation Solution
A stack package design featuring a core die stacked over a controller die, with the controller die positioned between the core die and the package substrate, utilizing through vias and wirings to connect the components, and bridge dies to enhance electrical connections and reduce path lengths, thereby improving operational efficiency and preventing defects during assembly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If memory cell arrays and control circuits are integrated in the same die, then device complexity is reduced, but manufacturing precision and reliability deteriorate due to mutual interference in processing steps
Solution Approach 1:
The patent divides the semiconductor device into separate functional components: memory dies containing memory cell arrays and controller dies containing control circuits. This segmentation allows each die to be manufactured and processed independently, avoiding mutual interference in processing steps while maintaining overall system functionality through vertical stacking and interconnection structures.
2Length of moving object
If through vias are used to connect stacked dies, then electrical connection paths are shortened, but device complexity increases due to additional interconnection structures
Solution Approach 1:
The patent transitions from planar lateral connections to vertical three-dimensional connections using through vias that penetrate the controller die. This dimensional change enables direct electrical connection between the memory die and controller die, significantly shortening the electrical connection path length while the complexity is managed through standardized via formation processes.
3Adaptability or versatility
If multiple connection pads are arranged in the pad region, then connectivity is enhanced, but manufacturing precision deteriorates due to alignment difficulties
Solution Approach 1:
The patent introduces an interposer or redistribution layer structure as an intermediary between the connection pads on different dies. This intermediary provides a standardized interface that simplifies alignment requirements, allowing multiple connection pads to be arranged with enhanced connectivity while maintaining manufacturing precision through the mediating structure.
Data Source
AI summary
A stack package includes a core die disposed over a package substrate, and a controller die disposed between the core die and the package substrate to control the core die. The core die includes banks each including memory cell arrays, an interbank region in which row decoders and column decoders are arranged, and a pad region in which first connection pads electrically connected to the row decoders and column decoders through first wirings are disposed. The controller die includes a through via region in which controller die through vias penetrating the controller die to be connected to the first connection pads are disposed, and a circuit region in which controlling circuitry electrically connected to the controller die through vias through second wirings is disposed.