3D Semiconductor Memory Stack Layout for Via and Annealing Limits
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Solution Overview
Problem
As semiconductor storage devices integrate more conductive layers, the aspect ratio of through via holes increases, making it difficult to remove the gate insulating film at the bottom surface, and heat treatment for modifying the crystal structure of semiconductor layers can lead to metal atom diffusion, affecting device operation.
Innovation Solution
The upper end of the semiconductor layer is exposed by removing the semiconductor substrate, allowing formation of a semiconductor layer with high impurity concentration without needing to remove the gate insulating film from through via holes, and using laser annealing to modify the crystal structure of amorphous silicon while preventing metal atom diffusion through insulating layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of conductive layers is increased to improve storage capacity, then the aspect ratio of through via holes increases, but it becomes difficult to remove the gate insulating film from the bottom surface of the via holes
Solution Approach 1:
The patent applies preliminary action by removing the semiconductor substrate before forming the through via holes. This preliminary removal creates direct access to the bottom surface of the via holes, eliminating the difficulty of removing the gate insulating film from deep within high-aspect-ratio holes. The substrate is removed in advance, before the via hole formation process, so that subsequent etching can easily reach and remove the gate insulating film without having to traverse a long path through the substrate.
2Stability of the object's composition
If heat treatment is applied to modify the crystal structure of semiconductor layers, then the crystal structure is successfully modified, but metal atom diffusion occurs affecting device operation
Solution Approach 1:
The patent uses an insulating layer as an intermediary barrier between the semiconductor layer and the metal electrodes. This insulating layer prevents direct contact and diffusion pathways between metal atoms and the semiconductor during heat treatment processes. The intermediary layer allows the heat treatment to proceed for crystal structure modification while blocking the harmful metal atom diffusion that would otherwise occur through direct contact interfaces.
3Ease of operation
If the gate insulating film is removed from through via holes to enable semiconductor layer connection, then connection is achieved, but the process becomes extremely difficult when aspect ratio is high
Solution Approach 1:
The patent performs preliminary removal of the semiconductor substrate before forming the through via holes. This preliminary action fundamentally changes the geometry of the via holes, transforming them from high-aspect-ratio holes that extend through the entire substrate thickness to low-aspect-ratio holes formed in the exposed region. This preliminary substrate removal makes the subsequent gate insulating film removal process straightforward and achievable with standard fabrication techniques.
Solution Approach 2:
The patent changes the dimensional relationship by removing the substrate, which effectively reduces the depth dimension of the via holes. Instead of forming via holes that must traverse the full substrate thickness (high aspect ratio), the via holes are formed after substrate removal, creating a much shorter path through the remaining structures (low aspect ratio). This dimensional change fundamentally simplifies the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method facilitates easy connection of the semiconductor layer to the source line and prevents metal atom diffusion, ensuring the semiconductor storage device operates suitably by avoiding the need to remove the gate insulating film from high-aspect-ratio via holes and controlling heat treatment.
Implementation Method 1
using laser annealing to modify the crystal structure of amorphous silicon
Implementation Method 2
laser annealing to modify the crystal structure of amorphous silicon
Implementation Method 3
preventing metal atom diffusion through insulating layers
Data Source
AI summary
A semiconductor storage device includes first and second stacks, and first to fourth semiconductor layers. The first stack includes first conductive layers and first insulating layers alternately stacked in a first direction. The first semiconductor layer extends through the first stack. The second semiconductor layer extends in a second direction above the first stack and connected to the first semiconductor layer. The second stack includes second conductive layers and second insulating layers alternately stacked in the first direction. The first and second stacks are arranged in a third direction. The third semiconductor layer extends through the second stack. The fourth semiconductor layer extends in the second direction above the second stack and connected to the third semiconductor layer. A third conductive layer is in contact with upper surfaces of the second and fourth semiconductor layers. The second and fourth semiconductor layers are separated from each other in the third direction.